SSP1 problem on LPC1788

[lpcware]

Content originally posted in LPCWare by virtuPIC on Mon Jul 20 07:09:24 MST 2015
Hi there,

I've got a board with an LPC1788. I want to access external flash and EEPROM via SSP1. SSP0 connection to an ADC works already.

Code looks like this (SSEL is handled by GPIO):

<code>
LPC_SSP_T *ssp = LPC_SSP1;
Chip_SSP_Init(ssp);
Chip_SSP_SetBitRate(ssp, 30000000);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 7, (IOCON_FUNC2 | IOCON_MODE_INACT));
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 8, (IOCON_FUNC2 | IOCON_MODE_INACT));
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 9, (IOCON_FUNC2 | IOCON_MODE_INACT));
Chip_SSP_SetFormat(ssp, SSP_BITS_8, SSP_FRAMEFORMAT_SPI,
SSP_CLOCK_CPHA0_CPOL0);
Chip_SSP_SetMaster(ssp, 1);
Chip_SSP_Enable(ssp);
</code>

This setup works for the ADC via SSP0 but not on SSP1. My scope doesn't show any signal on SCKL, MISO, MOSI.

Any help apprecciated!
Thomas

[lpcware]

Content originally posted in LPCWare by virtuPIC on Wed Jul 29 07:08:18 MST 2015

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Quote: MindBender

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Quote: virtuPIC
This setup works for the ADC via SSP0 but not on SSP1. My scope doesn't show any signal on SCKL, MISO, MOSI.

---

Did you check your pin multiplexer settings for all of the pins SCKL, MISO and MOSI signals can be multiplexed to? Perhaps you have accidentally multiplexed a signal to more than one pin, effectively shorting it to another signal (or ground, or power).

Are SCKL and MOSI in the state you expect them in? If you change CPOL, does SCKL change along? Can you detach MISO from the slave and influence its state with an external resistor?

---

Yes, they are okay. Actually my demand for a solution has shrunk dramatically in the meantime since I've received working code from a colleage. I haven't found any difference at first sight but when I have some spare time I'll check it and post it here. (Could be phase and polarity settings, but that's a first unqualified guess.)

Thank you all for your help!

[lpcware]

Content originally posted in LPCWare by MindBender on Wed Jul 29 05:22:25 MST 2015

---

Quote: virtuPIC
This setup works for the ADC via SSP0 but not on SSP1. My scope doesn't show any signal on SCKL, MISO, MOSI.

---

Did you check your pin multiplexer settings for all of the pins SCKL, MISO and MOSI signals can be multiplexed to? Perhaps you have accidentally multiplexed a signal to more than one pin, effectively shorting it to another signal (or ground, or power).

Are SCKL and MOSI in the state you expect them in? If you change CPOL, does SCKL change along? Can you detach MISO from the slave and influence its state with an external resistor?

[lpcware]

Content originally posted in LPCWare by virtuPIC on Wed Jul 22 06:22:47 MST 2015
Okay, I found out the problem of the GPIO control. There is a "fast GPIO port mask register" (user manual 8.5.1.2). I've modified the contents appropriately and the GPIO version worked as expected. However, this has no influence on SSP1.

[lpcware]

Content originally posted in LPCWare by virtuPIC on Wed Jul 22 04:57:57 MST 2015
Okay, new observation. Two CS pins are used in GPIO mode anyway - these are working perfectly. I've configured the SSP pins also as GPIO outputs and trigger them in the hope to see a square wave on the scope:

Chip_GPIO_SetPinDIROutput(LPC_GPIO, 0, 5);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, 0, 6);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, 0, 7);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, 0, 8);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, 0, 9);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 5, 1 << 7);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 6, 1 << 7);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 7, 1 << 7);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 8, 1 << 7);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 9, 1 << 7);
while (1)
{
vTaskDelay(1); // FreeRTOS delay by 1 ms
Chip_GPIO_SetPinOutLow(LPC_GPIO, 0, 5);
Chip_GPIO_SetPinOutLow(LPC_GPIO, 0, 6);
Chip_GPIO_SetPinOutLow(LPC_GPIO, 0, 7);
Chip_GPIO_SetPinOutLow(LPC_GPIO, 0, 8);
Chip_GPIO_SetPinOutLow(LPC_GPIO, 0, 9);
vTaskDelay(1); // FreeRTOS delay by 1 ms
Chip_GPIO_SetPinOutHigh(LPC_GPIO, 0, 5);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, 0, 6);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, 0, 7);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, 0, 8);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, 0, 9);
}

Now I'm getting 500 Hz on port 0 pins 5 and 6 but the other ones only switch from high to low only once after booting and stay there. (There seem to be pull ups on the bus.) This is really crazy.

[lpcware]

Content originally posted in LPCWare by virtuPIC on Tue Jul 21 02:35:35 MST 2015

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Quote: DF9DQ
Did you also try this:

LPC_IOCON->p[0][7] |= 1 << 7;
LPC_IOCON->p[[color=#f00]0[/color]][[color=#f00]8[/color]] |= 1 << 7;
LPC_IOCON->p[[color=#f00]0[/color]][[color=#f00]9[/color]] |= 1 << 7;

;-)

---

*blush* Embarassing typo. Corrected now. No change.

[lpcware]

Content originally posted in LPCWare by DF9DQ on Tue Jul 21 01:50:17 MST 2015
Did you also try this:

LPC_IOCON->p[0][7] |= 1 << 7;
LPC_IOCON->p[[color=#f00]0[/color]][[color=#f00]8[/color]] |= 1 << 7;
LPC_IOCON->p[[color=#f00]0[/color]][[color=#f00]9[/color]] |= 1 << 7;

;-)

[lpcware]

Content originally posted in LPCWare by virtuPIC on Mon Jul 20 22:55:51 MST 2015

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Quote: DF9DQ
My guess is that you forgot to set bit 7 in the IOCON registers of P0[7]...P0[9].

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Oops! You are right. I missed this point. However, adding

LPC_IOCON->p[0][7] |= 1 << 7;
LPC_IOCON->p[1][7] |= 1 << 7;
LPC_IOCON->p[2][7] |= 1 << 7;

didn't help.

[lpcware]

Content originally posted in LPCWare by DF9DQ on Mon Jul 20 10:22:14 MST 2015
My guess is that you forgot to set bit 7 in the IOCON registers of P0[7]...P0[9].

[lpcware]

Content originally posted in LPCWare by virtuPIC on Mon Jul 20 08:44:15 MST 2015
Well, at first implementation I had pull-up resistors enabled. However, SPI does not require them and I have disabled them again. And it made no difference.

Oh, and the PCONP bit is also set explicitly at the moment although it already is by reset.

[lpcware]

Content originally posted in LPCWare by MindBender on Mon Jul 20 08:36:41 MST 2015
Do you have internal pull-up resistors explicitly enabled, or external pull-up resistors installed? The three pins you have selected seem to be type W IOCON pins, according to table 75 on page 114 of the manual:
...
P0[6] IOCON_P0_6 R/W 0x030 0x4002 C018 D (tables 81, 82) All
P0[7] IOCON_P0_7 R/W 0x0A0 0x4002 C01C W (tables 89, 90) All
P0[8] IOCON_P0_8 R/W 0x0A0 0x4002 C020 W (tables 89, 90) All
P0[9] IOCON_P0_9 R/W 0x0A0 0x4002 C024 W (tables 89, 90) All
P0[10] IOCON_P0_10 R/W 0x030 0x4002 C028 D (tables 81, 82) All
...
Now the legend at the bottom of this table explains all the other IOCON pin types, but not type W. For that you need to go to section 7.4.1.5 of the manual, bearing the rather long title: "Type W IOCON registers (these pins are otherwise the same as Type D, but include a selectable input glitch filter, and default to pull-down/pull-up disabled)."

So you may need to switch on internal pull-up resistors. Without pull-up resistors, on many semiconductors you should be able to see some signal when (massively) increasing the vertical resolution on your scope though.