LPC824 external reset problem

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LPC824 external reset problem

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mkurus on Tue Dec 01 01:55:39 MST 2015
Hi,

I have a weird problem on my LPC 824 target board. It seems that MCU sometimes does not
initialize the pripherals correctly after external reset.

To check the issue I have compiled and flashed the simplest sample project periph_gpio
to my target board changing the systick interrupt as following;

void SysTick_Handler(void)
{
static uint8_t count = 0;

/* Set output value on port 0 pins 0-3 (0-1 on the 824). Bits that are
   not enabled by the mask are ignored when setting the port value */
DEBUGSTR("\r\ntest\r\n");
Board_LED_Toggle(0);
count++;
}
After power-on reset device correctly starts blinking led and sending chars to debug port.  But when an external reset signal is applied to reset pin sometimes led does not blink although
debug port operate correctly(So MCU is not is ISP mode). The only solution to restart blinking is power-on reset. This problem never exists on POR.

My reset pin is pulled-up with a 47K resistor but the problem continues with the reset pin left unconnnected.

Has anyone come across this issue before.

Thanks in advance
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rianzu
Contributor II

Unless you disable SWDIO & SWCLK from SWM (or alter their pins from IOCON) , the DEBUG port is (almost) always available as long as you have a valid clock (eg. your osc, whatever it is is running).

What is happening is that your MCUis indeed entering into ISP mode because of ISP pin "seen" in low state @boot time.

For debug purposes, make sure that PIO0_12 have a pull-up to Vdd, 10k will be just fine.

For production, disable sampling ISP pin but take care, you can have a brick part if:

- mess up with SWD pins

- stop your clock for some reason

- go into power down modes and don't (can't) resume to active mode

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