Unless you disable SWDIO & SWCLK from SWM (or alter their pins from IOCON) , the DEBUG port is (almost) always available as long as you have a valid clock (eg. your osc, whatever it is is running).
What is happening is that your MCUis indeed entering into ISP mode because of ISP pin "seen" in low state @boot time.
For debug purposes, make sure that PIO0_12 have a pull-up to Vdd, 10k will be just fine.
For production, disable sampling ISP pin but take care, you can have a brick part if:
- mess up with SWD pins
- stop your clock for some reason
- go into power down modes and don't (can't) resume to active mode