LPC824 + SCTimer + DMA = PWM out as sinus signal

[lpcware]

Content originally posted in LPCWare by vrm-janis on Tue Jul 28 05:44:56 MST 2015
Hello there.

I have solution for generation sine wave with variable base frequency, from PWM (LPC824 and SCTimer).

Simplifiedly:
SCTimer -> event which generate interrupt, reload matchrel[x] register from sine table (in RAM memory) in this interrupt and event x related to matchrel[x] is connected to out.set/clr to change pin state = PWM generate sine wave.

Interrupt routine:

void SCT_IRQHandler(void)
{
__disable_irq();
if (LPC_SCT->EVFLAG & 0x01)                                            // event 1 interrupt request?
{
if(Sin_Step0++ > SIN_STEPS) Sin_Step0 = 0;
LPC_SCT->MATCHREL[1].U = SinTable[Sin_Step0];// reload for match 1 - clear the OUT0
LPC_SCT->EVFLAG |= 0x01;                                    // clear flag
}
NVIC_ClearPendingIRQ(SCT_IRQn);
__enable_irq();
}

But, I have too much load in interrupt and processor time (generally in higher freq. of course) .

I have idea how to lighten it:

1. don't use SCT_IRQ
2. configure DMA transfer from SinTable[0] to LPC_SCT->MATCHREL[1].U, with length of uint32, with src autoincrement. This will be trigerred from event 1 of SCTimer.
3 configure event 1 of SCTimer for triggering DMA.
Run it.

Think I right?

Theoretically without any core intervention, will be functional ! - but one period only

How to reload DMA transfer at end of sinetable from zero again (with minimal MCU core load) ?????

Thank you.

p.

[lpcware]

Content originally posted in LPCWare by vrm-janis on Tue Aug 11 01:56:00 MST 2015

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Quote: MarcVonWindscooting
Good work!

However, in my applications I have to adjust frequency very often, so re-calculation of the sine table was never an option to me.
Also, I don't like the idea to store a sine-table in RAM.
I wonder if it's possible to use SCT 'A' for PWM generation and timer 'B' for triggering the match reloads.

---

In my case, is counter for SCT timer in unified mode (Hi + Low together).
Theoretically Is no problem divide counter to two (high and low) and use their for sine generation (ex. High counter) and for sine table recalculate (Low counter).
Connect next free event with enabled interrupt generation to Low Counter.
Generated SCT Interrupt, can be used as sine recalculation (use flag for recalculation requirement -> minimize MCU core load)...
But PWM resolution will decrease to 16-bit.

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Quote: MarcVonWindscooting

Now do the re-loading of the match registers of A with timer B. This is not in sync with timer A, but I guess that's not really neccessary!? The frequency of B determines
the sine output frequency and you can change that one with one single match reload. ('A' and 'B' may be low/high part of the SCT)
What do you think about this?
Marc

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Better then try it, is test it :-)

[lpcware]

Content originally posted in LPCWare by MarcVonWindscooting on Mon Aug 10 06:08:28 MST 2015
Good work!

---

Quote: vrm-janis

Core are working only in :
- frequency changes request -> recalculate sine table
- and shift change request -> change Source address in A & B descriptors (depends on sine shift)
peter

---

However, in my applications I have to adjust frequency very often, so re-calculation of the sine table was never an option to me.
Also, I don't like the idea to store a sine-table in RAM.
I wonder if it's possible to use SCT 'A' for PWM generation and timer 'B' for triggering the match reloads. Now do the re-loading of the
match registers of A with timer B. This is not in sync with timer A, but I guess that's not really neccessary!? The frequency of B determines
the sine output frequency and you can change that one with one single match reload. ('A' and 'B' may be low/high part of the SCT)
What do you think about this?

Marc

[lpcware]

Content originally posted in LPCWare by vrm-janis on Wed Aug 05 00:46:29 MST 2015
OK,

It's working and without core loading!

3 DMAs are configured as linked. Each with 3 descriptors:
- START descriptor (start to full Sine Table) - loaded as initial
- A descriptor - first part of sine (Start + Shift of sine table)
- B descriptor - last part of sine (Shift to end of sine table).

Start descriptor are linked to A.
A descriptor is linked to B desc.
B desc. is linked to A descriptor.     <- this is it!

As destination address in descriptor are address of matchreload registers of SCT.

Now, 3x Sine wave with variable frequency and shift is generated independently to core.
Core are working only in :
- frequency changes request -> recalculate sine table
- and shift change request -> change Source address in A & B descriptors (depends on sine shift)

peter

[lpcware]

Content originally posted in LPCWare by vrm-janis on Tue Jul 28 22:32:27 MST 2015
Yes,

3 phases motor. Special motor from aviation industry.

But shift and next 2 phases are not problem...

[lpcware]

Content originally posted in LPCWare by MarcVonWindscooting on Tue Jul 28 06:49:28 MST 2015

---

Quote: vrm-janis
[yes, it's motor controller]

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So we're not talking about 1 phase only, but of 2 or 3 (with individual shifts)...?
What kind of motor is it?

Marc

[lpcware]

Content originally posted in LPCWare by vrm-janis on Tue Jul 28 06:18:33 MST 2015

---

Quote:
I haven't done anything with DMA yet... Sad

I doubt, the CPU is overloaded from reloading your sine values unless you go for very high frequencies. If you go for high frequencies, then your PWM resolution is low (+- 15 steps at 1MHz as an example) and the sine-table is of little use.

---

My goal is about 400Hz +/- tens of hertz....

I have an one idea now:
Use DMA transfer configured as linked.
- all DMA descriptor will be stored in sinetable = too much RAM will be occupied (I have 2/3 RAM of free now).

---

Quote:
Don't be too extreme, the core is designed for doing work Wink

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I now, but the rest of my application need core also (921600 baud UART communication with proprietary protocol, feedback from motor [yes, it's motor controller], corrections, calculations,... etc.]


And LPC824 is sexy :-) It's small and powerful...

Still be possible use LPC1549.... (but is bigger)

p.

[lpcware]

Content originally posted in LPCWare by MarcVonWindscooting on Tue Jul 28 06:05:24 MST 2015
I haven't done anything with DMA yet... :(

I doubt, the CPU is overloaded from reloading your sine values unless you go for very high frequencies. If you go for high frequencies, then your PWM resolution is low (+- 15 steps at 1MHz as an example) and the sine-table is of little use.

Don't be too extreme, the core is designed for doing work ;-)

Marc