LPC54x USB VBUS when Vdd=0V

[nudge]

Hi NXP,

I think there is an incorrect specification in the LPC546XX Product Data Sheet (Rev. 2.7) document in Section 13.7 "Suggested USB0 Full-speed interface solutions" (pg151). It is suggested to use a voltage divider to lower the voltage on the pin to below 3.6V when Vdd = 0V and VBUS is present.

The datasheet states: "the voltage divider should provide a reduction of 3.6 V/5.25 V or ~0.686 V".

This looks incorrect, the ratio should be 0.686, and the reduction should be at least 1.65V (=5.25-3.6).

Furthermore, the ratios on the LPCXpresso54628 Development Board (OM13098) look incorrect, it uses R3=470 and R4=2.2k divider which results in an output voltage of 4.326V for a 5.25V VBUS.

Am i missing something here?

Thanks,
David

Related thread: What is are the resistor values permitted on Vbus for the LPC1837 

[xiangjun_rong]

Hi, David,

I think the requirement of reduction of USB_VBUS voltage is correct when the VDD is zero while the USB_VBUS voltage is coming.

Regarding the LPCXpresso54628 Development Board (OM13098), as you know that the board OM13098 is always bus-powered device, in other words, once the USB port is inserted, the LPC54xxx will be powered immediately by the USB_VBUS, so the resistor divider for USB_VBUS does not make sense.

Hope it can help you

BR

XiangJun Rong