LPC546 Flash Programming Ram usage and 2s complement

[guitardenver]

I'm going through the users manual for the LPC546 MCU and learning about how I can edit the internal flash. We are creating our own bootloader.

I just have a few questions to make sure i'm understanding this correctly.

1) Using the NXP bootloader loaded into the Boot ROM space is the only way for the application code to edit internal flash. Is that correct?

2) Bootloader RAM usage. In section 4.3.8, it says for IAP that it will use the user stack with up to 128 bytes. This is the stack from the First "StackTop" vector in the table?

3) Bootloader RAM usage. It also says in section 4.6 that "IAP commands,
which results in a flash write/erase operation, use 32 bytes of space in the top portion of
the on-chip RAM for execution. The user program should not be use this space if IAP flash
programming is permitted in the application."
Am I missing any other RAM usage when using IAP?

4) In the example project in the lpcxpresso SDKs. Using "Legacy" images, they all run fine. The 8th vector in the table is the 2s compliment of the first 7. But I can not seem to find where that happens? Where is that 8th vector being calculated and put into the image? The binary file does not have it, but once it's programmed on a device it has the right value.

[Omar_Anguiano · Accepted solution]

Hello Matt Lang 

1. No, you can build your own boot loader and still be able to edit the internal flash
2. The Stack that refers the chapter is located at the last locations of the RAM
3. No, You are not missing any other RAM usage, you can use up to 128kB
4. This value is calculated at the Linker Script when you debug your project

Let me know if this is helpful.

Best Regards,

Omar