LPC4370 High Speed Data Acquisition not running at 80MSPS

[vxs187]

I am programming using an LPC4370 to acquire data at 80msps, I am transferring data using USB communication. Although I think I have set all the required ADCHS configurations, I still only get it to run at 40msps if I do FFT of the data after acquisition. Please let me know what I might have to do. 

I have attached a part of my codes, and I am using the libraries of NXPOpen. 

void initialize_hsadc(void) {     LPC_ADCHS->POWER_DOWN = 0;     LPC_ADCHS->FLUSH = 1;     Chip_HSADC_Init(LPC_ADCHS);     LPC_ADCHS->FIFO_CFG = (15 << 1)                /* FIFO_LEVEL*/         | (1);                      /* PACKED_READ*/     LPC_ADCHS->DSCR_STS = 1;      //NOTE: CH0     LPC_ADCHS->DESCRIPTOR[0][0] = (1 << 31)              /* UPDATE TABLE*/         | (1 << 24)                       /* RESET_TIMER*/         | (0 << 22)                       /* THRESH*/         | (0xA00 << 8)                    /* MATCH*/         | (0x10 << 6);                     /* BRANCH*/      //NOTE: CH1     LPC_ADCHS->DESCRIPTOR[1][0] = (1 << 31)              /* UPDATE TABLE*/         | (1 << 24)                         /* RESET_TIMER*/         | (0 << 22)                         /* THRESH*/         | (0x01 << 8)                       /* MATCH*/         | (0x01 << 6);                       /* BRANCH*/      LPC_ADCHS->CONFIG= (0x90 << 6)                 /* RECOVERY_TIME*/         | (0 << 5)                       /* CHANNEL_ID_EN*/         | (0x01)                       /* TRIGGER_MASK*/;      const uint8_t kDGEC = 0xE;     LPC_ADCHS->ADC_SPEED = (kDGEC << 16)         | (kDGEC << 12)         | (kDGEC << 8)         | (kDGEC << 4)         | (kDGEC);      //Didn't set threshold registers as they aren't used     LPC_ADCHS->POWER_CONTROL = (1 << 18)               /* BGAP*/         | (1 << 17)                    /* POWER*/         | (1 << 10)                      /* DC in ADC0*/         | (1 << 4) | (0x4);                  /* CRS*/ }  void setup_dma(void){      //DMA settings     Chip_GPDMA_Init(LPC_GPDMA);                 // Initialize the GPDMA     LPC_GPDMA->CONFIG =   0x01;     while( !(LPC_GPDMA->CONFIG & 0x01) );      /* Clear all DMA interrupt and error flag */     LPC_GPDMA->INTTCCLEAR = 0xFF;                 //clears channel terminal count interrupt     LPC_GPDMA->INTERRCLR = 0xFF;                 //clears channel error interrupt.      LPC_GPDMA->CH[DMA_CH].SRCADDR  =  (uint32_t) &LPC_ADCHS->FIFO_OUTPUT[0];     LPC_GPDMA->CH[DMA_CH].DESTADDR = ((uint32_t) &sample);     LPC_GPDMA->CH[DMA_CH].CONTROL  =  (TRANSFER_SIZE_DMA)            // transfer size         | (0x0  << 12)                    // src burst size         | (0x0  << 15)                    // dst burst size         | (0x2  << 18)                      // src transfer width         | (0x2  << 21)                      // dst transfer width         | (0x1  << 24)                      // src AHB master select         | (0x0  << 25)                      // dst AHB master select         | (0x0  << 26)                      // src increment: 0, src address not increment after each trans         | (0x1  << 27)                      // dst increment: 1, dst address     increment after each trans         | (0x1  << 31);                     // terminal count interrupt enable bit: 1, enabled      LPC_GPDMA->CH[DMA_CH].CONFIG   =  (0x1 << 0)               // enable bit: 1 enable, 0 disable         | (HSADC_DMA_READ     << 1)                  // src peripheral: set to 8   - HSADC         | (0x0 << 6)                        // dst peripheral: no setting - memory         | (0x6 << 11)                       // flow control: peripheral to memory - DMA control         | (0x1 << 14)                       // IE  - interrupt error mask         | (0x1 << 15)                       // ITC - terminal count interrupt mask         | (0x0 << 16)                       // lock: when set, this bit enables locked transfer         | (0x1 << 18);                      // Halt: 1, enable DMA requests; 0, ignore further src DMA req     LPC_GPDMA->CH[DMA_CH].LLI =  0; }
/* Bit Manipulation for USB communication */ for(int i = 0; i < a1; i++){    sample_tx[2*i+1] = (uint8_t)(sample[i]>>8);    sample_tx[2*i] = (uint8_t)sample[i];
}  /* Sending the USB Data */  while (libusbdev_Connected()) {    libusbdev_Send(&sample_tx[0], sizeof(sample_tx)/sizeof(sample_tx[0]));    break;                    // Break out of the loop once the data is sent }

Thanks in advance!

[xiangjun_rong]

Hi, Visweshwar,

How do you know that the ADC sampling frequency is 40MSPS instead of 80MSPS?

BR

XiangJun Rong

[vxs187]

Hi again, 

Do you have any updates on this? 

Thanks and regards, 

Vish

[vxs187]

Hi, 

I got the data and run fft on it, with sampling frequency as 40 and 80MHz. I got the right frequency response only at 40MHz.