LPC1857 jump to USB/DFU bootloader from the application

[lpcware]

Content originally posted in LPCWare by g.seidl on Tue Mar 11 05:35:14 MST 2014
We want to use the USB/DFU mechanism to update our firmware.
The USB/DFU loader is already implementetd in the boot rom.
The USB/DFU loader starts normally on power up if the Boot mode = USB0
and the boot pin P2_7  = high.
This works.

But we want to jump to the USB/DFU loader (in the boot rom) from our firmware (in the internal flash).
How can we jump to the USB/DFU loader (without reset, without powerup, without P2_7 = high) ?

Background: We don't want to have a boot jumper.

Any ideas ?

Thank you!

[MarkDale]

Hi, I know we're a little late to the party, but we're trying to run this example code on an LCP18S37 dev kit vrsn3 rev B, but have had no luck.

After running the code the device doesn't enumerate over USB.

Looks like we're running v12.2 of the bootcode:

Here's the code we attempted to use:

#include "board.h"

typedef struct {
    volatile uint32_t CTRL;
    volatile uint32_t REMAP;
    volatile uint32_t CODE_COMP[6];
    volatile uint32_t LIT_COMP[2];
} FPB_Type;

#define FPB ((FPB_Type *)0xE0002000)

int main(void)
{
    SystemCoreClockUpdate();
    Board_Init();

    LPC_RGU->RESET_CTRL[0] = 0x387F1200;
    LPC_RGU->RESET_CTRL[1] = 0x17FFF7FF;
    FPB->REMAP = 0x20000000;
    ((volatile uint32_t *)0x20000000)[0] = 0x20152015;
    FPB->CODE_COMP[0] = 0x10402404 | 0x00000001;
    FPB->CTRL = 0x00000003;
    LPC_CREG->CREG6 &= ~(1u << 17);
    ((void(*)(int))0x10402B4D)(LPC_OTP_BASE);
    ((void(*)(int))0x10402D43)(LPC_OTP_BASE);
    ((void(*)(int))0x10405563)(LPC_OTP_BASE);
    ((void(*)(int))0x10405577)(LPC_OTP_BASE);

    while(1);
}

Have you got any suggestions for us?

Kinds regards,

Mark

[lpcware]

Content originally posted in LPCWare by bavarian on Thu Mar 10 06:34:36 MST 2016
The trick is that you fake the result read from the bootcode pins.
In the current software for USB0 we fake it to 2015, for USB1 it would be 2016.

 ((volatile uint32_t *)0x20000000)[0] = 0x20162016;  /* movs r0,#0x16 (2x) */

      

That I did this software for USB0 in 2015 and now we have 2016 is an amazing coincidence. Let me check for the next year's version  8-)

Regards,
NXP Support Team.

[lpcware]

Content originally posted in LPCWare by bavarian on Thu Mar 10 06:20:50 MST 2016
I used the software attachment from 23.9.2015 and configured it for LPC1857 and let it run on a LPC18S37/LPC43S37.
It works fine by just downloading the example as is.
If you need to integrate this into your software, then it's your responsibility to make a wind-back of things which could be harmful. The example itself does not do any wind-back activities.

Regards,
NXP Support Team.

[lpcware]

Content originally posted in LPCWare by kris_sin on Fri Jan 29 14:26:14 MST 2016
Thanks for showing us the trick how to jump into USB0 DFU.
Is there any chance You could also post method of jumping into [u]USB1[/u] DFU ?

Regards,
Kris

[lpcware]

Content originally posted in LPCWare by cvgkrishna on Wed Jan 06 07:59:35 MST 2016
We are using this example with lpc18s37 lpcxpresso board. IDE we are using is LPCXpresso latest version 8 bootloader version is 12.2(0C02)
we are facing below issues
[1] We tried "re-invoke ISP for USB0" example,we are able to detect the board but it is failing  after the 4s delay using DFU utility
[2] We tried using this example lpc18xx_43xx-start-dfu.zip  but it is going into some unknown state. while debugging it is going to hard fault
we already came to know from different post that we should not be using it in debug mode.
[3]We tried this example in Release and Debug both the modes but of no luck
[4]We are assuming this example already takes care of setting core to 96 MHz Mode.Please confirm.

If possible Can you upload your working code for lpcxpresso tested on 18s37

Thanks
Gopal

[lpcware]

Content originally posted in LPCWare by bavarian on Thu Oct 02 02:26:26 MST 2014
The Keil project is attached to my post from 23. September, so have a look there.
It's no problem to open and compile it with the eval version of Keil uVision.


Regards,
NXP Support Team

[lpcware]

Content originally posted in LPCWare by fred033 on Wed Oct 01 08:54:00 MST 2014
Hello,

I've test with your file and it's work. I don't understand why my project don't work. Which compilation option are set in your Keil project?

Thank you.

[lpcware]

Content originally posted in LPCWare by bavarian on Tue Sep 30 10:27:50 MST 2014
Hello

I was now able to compile your project, flashed it to bank #A and I see that it doesn't work.
Maybe the startup environment is different, maybe the compiler is doing something different.
I will do a few further tests tomorrow, but I don't intend to spend too much time on it.

I did another crosscheck with my Keil project and this works fine. Attached are the AXF and the BIN file of my project for you to test.
If you program it into bank #A, you can see that with every hardware reset the Device manager shows an LpcDevice.

Regards,
NXP Support Team

[lpcware]

Content originally posted in LPCWare by fred033 on Mon Sep 29 05:21:06 MST 2014
Hello,

I've tried with your main.c file and I can't jump into USB/DFU.
I've attached my LPCXpresso project.

To verify if I jump into USB/DFU, I'm doing the following :
- Download software into LPC4337 with JTAG (in debug mode in my project)
- Stop debug mode
- Reset the board
- With DFU-sec, I check if I've possibility to start a download operation.

Thank you for your help.

[lpcware]

Content originally posted in LPCWare by bavarian on Mon Sep 29 02:24:09 MST 2014
Hello,

I can't verify your project because the ZIP file seems to be corrupted.
Anyway, I tested my project again, changed the code here and there to the 12.1 bootcode and it works.
I attached the main.c for exactly this configuration, so please make a crosscheck with your code.

Please notice that this project is set to LPC1857 with Cortex-M3, but it works as is on the LPC4337/57 as well.

Regards,
NXP Support Team.

[lpcware]

Content originally posted in LPCWare by fred033 on Fri Sep 26 06:08:47 MST 2014
Hello bavarian,

I've tried with your new project but without effect, we didn't start in DFU mode.

We are using an LPC4337FET256, my boot code version (found using IAP command 55) return 0xc0001 (version 12.1 ?)

I put my LPCXpresso project in attached file.

Thank you.

[lpcware]

Content originally posted in LPCWare by bavarian on Tue Sep 23 05:01:00 MST 2014
OK, here is the new project which is running on the following chips:

[list]
  [*]  LPC1850/30/20/10 Rev A                                                  (Bootcode v11.2)
  [*]  LPC4350/30/20/10 Rev A                                                  (Bootcode v11.2)
  [*]  LPC4370                                                                            (Bootcode v11.2)
  [*]  LPC1857 and all other flash based derivatives rev "-"       (Bootcode v12.1)
  [*]  LPC4357 and all other flash based derivatives rev "-"       (Bootcode v12.1)
  [*]  LPC1857 and all other flash based derivatives rev "A"      (Bootcode v12.2  (available Q4/2014)
  [*]  LPC4357 and all other flash based derivatives rev "A"      (Bootcode v12.2  (available Q4/2014)
[/list]

All required information how to deal with it is embedded in the source code in file main.c.
If you see any issues with please post it here.

Regards,
NXP Support Team

[lpcware]

Content originally posted in LPCWare by fred033 on Fri Sep 19 07:29:23 MST 2014
Hello,

I'm trying this code on an LPC4337 chip, but it don't work.
Where can I find  ROM memory address for this chip ?
I need following address :
    // Clocks_Init
   // tmBootRomConfig_Clocks_and_Pins
   // tmBootRomISP_init
   // tmBootRomISP_run

Thank you.

[lpcware]

Content originally posted in LPCWare by g.seidl on Mon Mar 17 06:40:08 MST 2014
It seems to work!

Thank you bavarian :)

[lpcware]

Content originally posted in LPCWare by bavarian on Fri Mar 14 04:40:09 MST 2014
It's possible to do something like that. The principle flow is the following:

- wind back the MCU status to reset state as much as possible
- jump to the bootcode
- use the flash patch unit (part of Cortex-Mx system) to prevent from executing the normal bootloader flow (ignore ISP and bootmode pins)


Attached is a minimized project which is exactly doing this for the LPC1857 and LPC4357 (xx53 and xx33 are supported as well).
The LPC1850 and LPC4350 (flashless parts) have a different bootloader, so the software needs to be changed for these chip types.
Please test it if it works for you, we don't officially support this method   0:)

Regards,
NXP Support Team