The global time base (GTB) is a FTM function that allows the synchronization of multiple FTM modules on a chip. The following figure shows an example of the GTB feature used to synchronize two FTM modules. In this case, the FTM A and B channels can behave as if just one FTM module was used, that is, a global time base. K65’s FTM0 provides the only source for the FTM global time base. The other FTM modules can share the time base as shown in the following figure:
// Configure ftm params with frequency 2MHz for CLK
ftm_pwm_param_t ftmParamCLK = {
.mode = kFtmEdgeAlignedPWM, //PWM mode
.edgeMode = kFtmLowTrue, //PWM Low-true pulses (clear Output on match-on)
.uFrequencyHZ = 200000u, //2MHz clock frequency
.uDutyCyclePercent = 50, //Duty cycle 50%
.uFirstEdgeDelayPercent = 0,
};
//using FTM0 & FTM3 GTB feature
FTM_HAL_SetClockSource (FTM0, kClock_source_FTM_None); //disable FTM0 clock source
FTM_HAL_SetClockSource (FTM3, kClock_source_FTM_None); //disable FTM3 clock source
FTM_HAL_SetGlobalTimeBaseCmd(FTM0, true); //enable FTM0 GTBEEN
FTM_HAL_SetBdmMode(FTM0, kFtmBdmMode_11); //enable FTM0 BDMMODE
FTM_HAL_SetGlobalTimeBaseCmd(FTM3, true); //enable FTM3 GTBEEN
FTM_HAL_SetBdmMode(FTM3, kFtmBdmMode_11); //enable FTM3 BDMMODE
FTM_HAL_SetClockSource (FTM0, kClock_source_FTM_SystemClk); //disable FTM0 clock source
FTM_HAL_SetClockSource (FTM3, kClock_source_FTM_SystemClk); //disable FTM3 clock source
FTM_HAL_SetCounter(FTM0, 0U); //clear TFM0 counter value to 0
FTM_HAL_SetCounter(FTM3, 0U); //clear FTM3 counter value to 0
FTM_HAL_SetGlobalTimeBaseOutputCmd(FTM0, true); //enale FTM0 GTBEOUT
Please check attached video about after using GTB feature, the FTM0_CH4 and FTM3_CH1 PWM output signals.
The two PWM output signal will provides the same clock frequency with different duty cycle. The two PWM output signal need use the same PWM mode. Please check below code to enable K65’s FTM0 module output two PWM signals.
// Configure ftm params with frequency 2MHz for CLK
ftm_pwm_param_t ftmParamCLK = {
.mode = kFtmEdgeAlignedPWM, //PWM mode
.edgeMode = kFtmLowTrue, //PWM Low-true pulses (clear Output on match-on)
.uFrequencyHZ = 200000u, //2MHz clock frequency
.uDutyCyclePercent = 50, //Duty cycle 50%
.uFirstEdgeDelayPercent = 0,
};
// Configure ftm params with frequency 2MHz for CLK
ftm_pwm_param_t ftmParamSH =
{
.mode = kFtmEdgeAlignedPWM, //PWM mode
.edgeMode = kFtmLowTrue, //PWM Low-true pulses (clear Output on match-on)
.uFrequencyHZ = 200000u, //2MHz clock frequency
.uDutyCyclePercent = 75, //Duty cycle 75%
.uFirstEdgeDelayPercent = 0,
};
// Initialize FTM module,
// configure for software trigger.
memset(&ftmInfo, 0, sizeof(ftmInfo));
ftmInfo.syncMethod = kFtmUseSoftwareTrig; //Using software trigger PWM synchronization
FTM_DRV_Init(BOARD_FTM_INSTANCE, &ftmInfo); //FTM0 initialization
FTM_DRV_SetClock(BOARD_FTM_INSTANCE, kClock_source_FTM_SystemClk, kFtmDividedBy1); //Enable FTM0 counter clock
FTM_DRV_PwmStart(BOARD_FTM_INSTANCE, &ftmParamCLK, BOARD_FTM_CHANNEL); //Enable PWM output at FTM0_CH4
FTM_HAL_SetClockSource(FTM0, kClock_source_FTM_None); //Disable FTM0 counter clock
FTM_DRV_PwmStart(BOARD_FTM_INSTANCE, &ftmParamSH, BOARD_FTM_CHANNEL5); //Enable PWM output at FTM0_CH5
The tested code also be attached, please using it with KSDK V1.2 software.
Wish it helps.