SDRam address location to enable cache on the K26

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SDRam address location to enable cache on the K26

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Ryman1
Contributor I

I’m looking for a little more detail on caching capabilities when using SDRam on the K26.

In the K26 reference manual, there are 5 cache regions available with R1 allowing write-thru for the DRAM controller at a base address of 0x0800_0000.  However in the System Memory map, there is an entry for SDRam at base address of 0x7000_0000 that shows SDRam External Ram-Write Back as a destination slave which is unclear to me what it's writing back to. 

Where does one place SDRam to enable cache on the K26?   From the cache region table, it looks like R1's address range is required.

What feature does placing the SDRam in the External Ram-Write Back or External Ram-Write Thru address ranges provide as called out in the System Memory map?

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jingpan
NXP TechSupport
NXP TechSupport

Hi @Ryman1 ,

Please refer to the addendum in reference manual. It says there is no system cache in K26,so address range higher than 0x2000_0000 should be removed from Cache regions table in Local Memory Controller chapter.

 

Regards,

Jing

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jingpan
NXP TechSupport
NXP TechSupport

Hi @Ryman1 ,

Please refer to the addendum in reference manual. It says there is no system cache in K26,so address range higher than 0x2000_0000 should be removed from Cache regions table in Local Memory Controller chapter.

 

Regards,

Jing

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Ryman1
Contributor I

Hi @jingpan 

  Yeah, figured this would be the case but just wanted to be certain.  Thanks much for the confirmation.

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