Kinetis KEA8 ADC FIFO

[dsula]

Hi,

This is a question regarding the ADC with FIFO operation of the KEA8 device.

I'm using hardware triggered ADC function and I would like to perform ADC conversions till the FIFO is full.

Once the FIFO is full, the ADC conversion should NOT continue even though the hardware trigger continues.

So far I was not able to achieve this function. It doesn't seem to be possible to stop the ADC conversion once the FIFO is full, the next hardware trigger will restart and refill the FIFO.

Conversion rate is too fast for the micro-controller to accept an IRQ for end-of-conversion and shut the ADC down.

I've also seen that there is an obscure ADC register ADC_SC5 which contains a bit called HTRGMASKSEL. I was hoping that the hardware trigger is automatically disabled once the FIFO is full when HTRGMASKSEL is set. Unfortunately this is not the case and there's not sufficient documentation on what this bit does in the first place.

I appreciate any help on this matter.

Daniel

[franciscorodrig]

Hi Kerry,

Thank you, I already knew that.

The "KEA8 Sub-Family Reference Manual" rev. 2, July 2014, page 325, figure 24-11 "ADC FIFO conversion sequence" shows, among other options, the "Hardware Triggered Multiple Conversion (ADC_SC4[HTRGME]=1)".

What I would like to confirm is that with a *single* hardware trigger the ADC starts converting all channels in the FIFO (no new triggers are required) and once all conversions are completed (ADC_SC1[COCO] = 1) the ADC *stops* automatically (unless it receives a second hardware trigger).

This is what I understand from the figure and the reading of the section 24.4.6 "FIFO operation", but I would like to confirm I have understood it correctly because the text does not mention the ADC stops automatically. Only mentions the ADC stops in single conversion mode.

Have a nice day,

Paco

[kerryzhou]

Hi Daniel Schoch,

      You can disable the ADC module by writing 0X1F to ADC_SC1[ADCH] in the FIFO full interrupt and after you read the data from the FIFO, then the FIFO will be reset and the conversion is stopped.

      When you enter in the FIFO interrupt ,you can disable the ADC interrupt at first, then read adc data and disable the ADC module.

      You can't use the HTRGMASKSEL set to mask the hardware trigger, because it mask the hardware trigger when data fifo is not empty, but I think you can choose the HTRGMASKE, when you enter in the FIFO interrupt, you set HTRGMASKE at first, then the hardware trigger will be masked.

     But If after the FIFO full and the before you enter in the FIFO interrupt interrupt, anther ADC conversion happens, I think your trigger and conversion is really too fast, you should slow down your trigger frequent.

Wish it helps you!

If you still have question, please contact me!

Have a great day,
Jingjing

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[dsula]

Hi Jingjing.

I understand that I can disable the ADC in the interrupt.

However that is not what I want.

I want to disable the ADC conversion AUTOMATICALLY when the FIFO is full.

I have configured the ADC for maximum sample rate and I'm operating with high priority interrupts. So sometimes a new sample conversion is already started before I enter the end-of-conversion ADC interrupt. This is not good because the new conversion will overwrite the FIFO before I get a chance to shut it down.

Thank you

Daniel

[franciscorodrig]

Hi,

Any update on this?

I also need to automatically stop conversions once the ADC FIFO is full in order to set a different depth and set of analog channels to sample each time the interrupt is triggered.

Is this possible?

[kerryzhou]

Hello Francisco Rodriguez- Ballester,

    You can use the interrupt, after the adc fifo is full, trigger the interrupt, and modify the depth in the interrupt directly.

Have a great day,
Kerry

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