Kinetis K40: Which pins can be configured open drain; and which pins are 5V tolerant?

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Kinetis K40: Which pins can be configured open drain; and which pins are 5V tolerant?

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thomasedel
Contributor III

Is there some documentation as to which pins on the K40 devices can be configured open drain?  In the Reference Manual (Document Number: K40P100M72SF1RM Rev. 1.1, Dec 2012) in section "11.14.1 Pin Control Register n (PORTx_PCRn)" it indicates for the Open Drain Enable bit (ODE) that "This bit is read only for pins that do not support a configurable open drain output."  A similar statement is made for Drive Strength Enable, Passive Filter Enable, and some other options.  Are all pins that are configurable as GPIO configurable as open drain???  What about the Passive Filter option, Drive Strength Enable, and other options that have that same statement?  The data sheet for the K40 also does not appear to have that kind of information.

A related question is:  Which pins are 5-volt tolerant?  Is there a list for that somewhere?

Thanks in advance for your help.

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Robin_Shen
NXP TechSupport
NXP TechSupport

Received the feedback from Kinetis AE team:

This is an older reference manual that did not contain the table.

 

On the K40 device in question, all digital pins can be configured as open-drain, drive strength enabled, and passive filter enabled in the corresponding Pin Control Register. Analog pins can not support these functions. Similarly, all of the digital function pins are 5V tolerant with exception of EXTAL/XTAL (PTA18/PAT19). The analog pins are not 5V tolerant.

 

Also, there is a method for using the pin as a 5V tolerant output as follows (assumes the pin is pulled to 5V through a resistor):

 

When the signal is switched as a GPIO pin, not timer or serial.

The procedure is:

  1. Go from disabled at powerup to GPIO - pin control register MUX=001 and ODE=0 (no open drain). The DSE and SRE bits can be written as well if needed. This configures the pin as a 5V tolerant input.
  2. Write 0 to the bit in the Port Data Output Register to configure the drive state.
  3. Write 1 to the bit in the Port Data Direction Register to switch from 5V input to driving low output.
  4. Write 0 to the bit in the PDDR to switch the output back to a 5V tolerant input.

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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi Thomas,

These information should be descripted in section "Ports summary" of Reference Manual. For the newly updated Reference Manual(for example K64P144M120SF5RM, you can find the section "Ports summary" ) But the documents of K40 have not be updated for a long time.

Ports summary.png

In my opinion all the GPIO of K40 support a configurable open drain output.(You can have a test: when configured as open drain, these pins can't output high level voltage.) But it's not true open drain, thest outputs must be pulled to VDD.(can't be pulled to 5V)

Open Drain.png

Best Regards,

Robin

 

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thomasedel
Contributor III

Thank you Robin for your reply.

The table you showed from the K65 manual does not appear to be in the K40 manual.  That is at the heart of the problem.  The KL43 manual has a similar table showing NO open-drain outputs.  What would the K40 table show, if it existed?  I think your implication that it is likely that all ports have open drain provision is probably correct.  It would be helpful if Freescale/NXP could actually state in K40 documentation which ports or pins support open drain outputs for the K40, rather than leaving us to guess at the answer.  Perhaps it exists in another document??

Regarding the issue of 5V tolerance.  Thanks for your comments.  Is there any K40 documentation regarding it, to confirm your reply?  Perhaps your point is that the newer manuals for the other K family members are more complete, and the K40 is similar.  Per another reply, the following statement is in the K40 reference manual in Table 2-10 "HMI Modules":
"All general purpose input or output (GPIO) pins are capable of interrupt and DMA request generation. All GPIO pins have 5 V tolerance."   There is no statement in the K40 manual (that I could find at least) that "Open drain outputs must be pulled to VDD" (per the page you copied from the K64 manual).  What is the point of 5V tolerant pins if they must be pulled to VDD, and VDD must be 3.6V or less?  Perhaps the point is just for use as inputs up to 5V(?).  Any additional clarification you could provide would be appreciated.

Thanks for your help.

-Thomas

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Robin_Shen
NXP TechSupport
NXP TechSupport

Received the feedback from Kinetis AE team:

This is an older reference manual that did not contain the table.

 

On the K40 device in question, all digital pins can be configured as open-drain, drive strength enabled, and passive filter enabled in the corresponding Pin Control Register. Analog pins can not support these functions. Similarly, all of the digital function pins are 5V tolerant with exception of EXTAL/XTAL (PTA18/PAT19). The analog pins are not 5V tolerant.

 

Also, there is a method for using the pin as a 5V tolerant output as follows (assumes the pin is pulled to 5V through a resistor):

 

When the signal is switched as a GPIO pin, not timer or serial.

The procedure is:

  1. Go from disabled at powerup to GPIO - pin control register MUX=001 and ODE=0 (no open drain). The DSE and SRE bits can be written as well if needed. This configures the pin as a 5V tolerant input.
  2. Write 0 to the bit in the Port Data Output Register to configure the drive state.
  3. Write 1 to the bit in the Port Data Direction Register to switch from 5V input to driving low output.
  4. Write 0 to the bit in the PDDR to switch the output back to a 5V tolerant input.
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thomasedel
Contributor III

Thank you, Robin, and the "Kinetis AE team", for your very thorough answer!  Very helpful.

-Thomas

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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi Thomas,

Sorry for the inconvenience. I will report these missing information to our document team.

The 5V tolerant pins were meant for dedicated inputs, not bidirectional data. If you want to use the K40 communicate with 5V device, maybe you need place a SN74LVC1T45.

Best Regards,

Robin

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pgo
Senior Contributor V

Hi Thomas,

Searching for "tolerant" in the Reference Manual you quoted gives:

pastedImage_1.png

Searching the corresponding Technical Data Manual gives some more details.

Searching for open-drain given inconclusive results e.g. selected pins.  I don't know who got to select which ones  :smileyhappy:

In practice you can check by seeing if the ODE bit is implemented/can be modified in the PCR register (using the debugger).

I have tried to use pins as open-drain with 5V pull-ups on a MK20 but I found the results less useful than expected.  When configured as inputs the pin would pull-up to 5V but not when configured as output, even with open-drain.

I presume the high-drive device was still interfering. I did not test this extensively since it was not critical but it would be a good idea to check if you get better results.

Let me know if you get better results.

bye

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thomasedel
Contributor III

Greetings PGO:

Thanks for your reply.  Very helpful.  I missed the line about all pins being 5V tolerant, but apparently that may not apply to open-drain outputs (in agreement with your tests on the MK20).  So, I am hoping someone else may have more specific information.

-Thomas

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pgo
Senior Contributor V

Hi Thomas,

The comments by Robin are consistent  with the results I obtained with a K22.  The pins are only 5V tolerant inputs.  Using them as outputs, even in open-drain mode they are clamped to Vdd.

A bit disappointing.  It looks like you have to use a 5V family for true compatibility.

bye

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