Kinetis 5V I2C interface

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Kinetis 5V I2C interface

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darkohadzidedic
Contributor I

Does Kinetis support interface with 5V pulIed up I2C bus? Not planning to use any internal pullups.

In what document can I find Kinetis General purpose pin circuit?
Thanks,
Darko

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mjbcswitzerland
Specialist V

Hi

I have used the I2C interface with external pull-ups to 5V. Just configure the pin characteristics to open-drain.

Regards

Mark

http://www.uTasker.com

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dereksnell
NXP Employee
NXP Employee

The Kinetis Port pins are only 5V tolerant as inputs.  The outputs are not 5V tolerant, and that includes pins configured as open-drain outputs.  In output mode, if the pin is pulled above VDD, it will cause the output buffer to drive the output at VDD, which will pull-down the pin voltage to near VDD.

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bobpaddock
Senior Contributor III

"The outputs are not 5V tolerant, and that includes pins configured as open-drain outputs.  In output mode, if the pin is pulled above VDD, it will cause the output buffer to drive the output at VDD, which will pull-down the pin voltage to near VDD."

How is an open-drain output going to drive the output to Vdd?  This makes it sound like the output is truly not open-drain, rather some pseudo-configuration.  What is the actual structure?

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erikmalund
Contributor I

How is an open-drain output going to drive the output to Vdd?  This makes it sound like the output is truly not open-drain, rather some pseudo-configuration.  What is the actual structure?


more correct an "open-drain output not driven low can not go above Vdd regardless of pull-up"

as stated above

"The 'problem' is the parasitic diodes that clamp the pin to Vdd. "

so "drive the output to Vdd" is not quite true, the exact is 'drive the output to Vdd plus a diode drop"

there, actually, are a few CMOS (HC series) where the capacity of the clamping diodes is specified., but for most chips they are not, they are "just there"

Erik

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bobpaddock
Senior Contributor III

I understand the implications of the Parasitic/ESD diode.  That prevents any voltage from going above Vdd..

If not current limited it could result in device damage if above Vdd-0.3V.  All of that is clearly stated in the datasheet.

However that does not support the the statement above about I2C inputs being "5V Tolerant".

What the datasheet (KL25) actually says is : "All digital I/O pins are internally clamped to VSS

through a ESD protection diode. There is no diode connection to VDD."  So maybe I2C can go to 5V (probably not)?

Nothing in the datasheet indicates anything is "5V tolerant" directly.

Makes me wonder if the Digital I/O are more susceptible to static?

Datasheet also says:

"All analog pins are internally clamped to VSS and VDD through ESD protection diodes."

A true open-drain output, unless we are talking about something strange like a depletion-mode FET (we are not), can only *sink* current,  it can not drive (source) current.  An open-source output would only source and could not sink current.

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OliverSedlacek
Contributor III

Well I've measured the SCL and SDA high voltage level when pulled up to 5V and they measure 4.0V and 4.1V, so they are definitely diode clamped to VDD inside the K60.

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erikmalund
Contributor I

one often overlooked fact is that the 3V3 signal levels (Vih, Vil, Voh, Vol) match the 'old' TTL levels which, more or less is standard for 5V chips.  I have mixed much 3V3 and 5V and never had any problems.  Of course, as stated above all inputs from 5V have to be to 5V tolerant pins. Yes, CMOS does better on the output, but check h the datasheet, the input requirements are the same as 5V TTL and easily handled by 3V3 outputs.

The outputs are not 5V tolerant, and that includes pins configured as open-drain outputs.  In output mode, if the pin is pulled above VDD, it will cause the output buffer to drive the output at VDD, which will pull-down the pin voltage to near VDD

goes for input as well  Tthe 'problem' is the parasitic diodes that clamp the pin to Vdd.  Some chips have 5V tolerant pins where the parasitic diodes are somehow avoided. some have been severely burned by driving 5V tolerant pins hard with 5V  An easy check: run 'blinky' apply 5V to a pin, oft course a 5V tolerant one, and remove the power supply, in most cases the chip will keep running.

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