K60 PDB problem with error clearing.

[oleg]

Hi,

I've implemented a component using PDB, ADC and DMA.

PDB triggers ADC which triggers DMA which copies data to a buffer.

From time to time DMA is not enabled to copy the data, and so result register of ADC is still full with the previous result, when the PDB tries to trigger the ADC once again.

I don't want to give in details why DMA is not enabled from time to time, so try to take it for a fact.

The problem is when I try to clear the error in PDB status register, and cannot do it.

In datasheet it is told to write 1's to the error bits to clear them.

Doesn't matter what I write (1's or 0's), the bits are never cleared.

I haven't found anything in errata as well.

Thanks in advance,

Oleg.

[apanecatl]

If you are debugging step by step you should be aware the PDB does not stop counting when you reach a breakpoint, so even though the error flags are effectively being cleared, the code will generate continuous errors and it will look like the error flags are always raised. So you cannot debug step by step when using the PDB.

[greglapin]

I have a similar problem but I don't think it is solely related to debug (I'm using a K40 on a KwikStik).

I have a PDB that triggers ADC0 and then samples are stored to a buffer with DMA.

The only time the CPU gets involved is when a buffer is full and the DMA interrupts the CPU to tell it to get the data.

This process runs fine as long as there are no interruptions.

Either if the code takes too long or a breakpoint is encountered in the debugger, the digitizing process locks up and I can't figure out how to restart it programmatically.

When it stops, PDB0_CH0S = 0x10001 (channel 0 sequence error) and I can't seem to clear it.

The ADC and DMA modules are not showing any errors, but the ADC0_SC1[COCO] bit is 0.

I have the PDB0_SC[PDBEIE] bit set and the ISR tries to clear the sequence error bit by writing 1 to it in PDB0_CH0S.

It also clears the PDB0_SC[PDBIF] bit by writing a 0 to it.

(One other question is that in the K40 Reference Manual (K40P100M100SF2RM) section 35.1.6 (Mode of Operation in the PDB chapter) lists a Debug mode, where the counter is paused when the processor is in debug mode.  There is no explanation of how to set the PDB into Debug Mode, but this would help).

Regardless, once I'm in this locked up state I can't get out of it without restarting the processor.  What do I need to do to get it started again?