Jenia
The FRDM-KE06Z target defaults to using the 8MHz crystal as clock source, based on these defines in app_hw_kinetis.h:
#define CRYSTAL_FREQUENCY 8000000 // 8 MHz crystal
#define _EXTERNAL_CLOCK CRYSTAL_FREQUENCY
#define CLOCK_DIV 256 // input must be divided to 31.25kHz..39.06525kHz range (/1, 2, 4, 8, 16, 32, 64, 128, 256, 512 or 1024 possible)
// this input is multiplied by 1024 to 32MHz..40MHz at the FLL output
#define SYSTEM_CLOCK_DIVIDE 1 // divide the FLL output to give the system clock (maximum 40MHz) (/1, 2, 4, 8, 16, 32, 64 or 128 possible)
#define BUS_CLOCK_DIVIDE 2 // divide by 1 or 2 to give bus and flash clock (maximum 20MHz)
This causes the 8MHz input to be divided down to 31'250Hz for the FLL input and then it is multipled by a fixed x1280 to 40.0MHz FLL output.
The system clock is 40MHz and the Bus clock is 20MHz, whereby the Bus clock is used to clock the UART.
The UART baud divider value is 0x0b, which gives 113'636 Baud, which is 1.5% lower than 115'200Baud but should usually be adequately accurate.
I would try with a slower Baud rate, like 19'600, to see whether you can get the menu to display correctly and otherwise check the HW to see whether there are any difficulties at the higher speed (like slow edges due to loading etc.). Since the OpenSDA virtual COM port doesn't respect XON/OFF it is usually necessary to limit to around 38.4kBaud to avoid the UART overrunning when programming flash when using the SREC method without INTERMEDIATE_PROG_BUFFER option (see quide for details).
Regards
Mark