Hello Zoran
The code involved has nothing to do with the IDE and I don't know how KSDK does it - but if you show me the initialisation code that you have I can probably show you which line(s) to change.
As reference - the uTasker project does it with this configuration:
#define OSC_LOW_GAIN_MODE
#define CRYSTAL_FREQUENCY 8000000 // 8 MHz crystal
#define _EXTERNAL_CLOCK CRYSTAL_FREQUENCY
#define CLOCK_DIV 2 // input must be divided to 2MHz..4MHz range (/1 to /24)
#define CLOCK_MUL 25 // the PLL multiplication factor to achieve operating frequency of 100MHz (x24 to x55 possible)
#define FLEX_CLOCK_DIVIDE 2 // 100/2 to give 50MHz
#define FLASH_CLOCK_DIVIDE 4 // 100/4 to give 25MHz
Which results in this code for the K22:
MCG_C2 = (MCG_C2_RANGE_1M_8M | MCG_C2_GAIN_MODE | MCG_C2_EREFS | MCG_C2_LOCRE0); // select crystal oscillator and select a suitable range
MCG_C1 = (MCG_C1_CLKS_EXTERN_CLK | MCG_C1_FRDIV_256); // switch to external source (the FLL input clock is set to as close to its input range as possible, although this is not absolutely necessary if the FLL will not be used)
while ((MCG_S & MCG_S_OSCINIT) == 0) {} // loop until the crystal source has been selected
while ((MCG_S & MCG_S_IREFST) != 0) {} // loop until the FLL source is no longer the internal reference clock
while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST_EXTERN_CLK) {} // loop until the external reference clock source is valid
MCG_C5 = ((CLOCK_DIV - 1) | MCG_C5_PLLSTEN0); // now move from state FEE to state PBE (or FBE) PLL remains enabled in normal stop modes
MCG_C6 = ((CLOCK_MUL - MCG_C6_VDIV0_LOWEST) | MCG_C6_PLLS);
while ((MCG_S & MCG_S_PLLST) == 0) {} // loop until the PLLS clock source becomes valid
while ((MCG_S & MCG_S_LOCK) == 0) {} // loop until PLL locks
SIM_CLKDIV1 = (((SYSTEM_CLOCK_DIVIDE - 1) << 28) | ((BUS_CLOCK_DIVIDE - 1) << 24) | ((FLEX_CLOCK_DIVIDE - 1) << 20) | ((FLASH_CLOCK_DIVIDE - 1) << 16)); // prepare bus clock divides
MCG_C1 = (MCG_C1_CLKS_PLL_FLL | MCG_C1_FRDIV_1024); // finally move from PBE to PEE mode - switch to PLL clock
while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST_PLL) {} // loop until the PLL clock is selected
So essentially, just the values of the defines need to be changed at the corresponding code locations in your initialisation.
The uTasker simulator verifies that all is in range and shows the values obtained when run:
Regards
Mark
Kinetis: µTasker Kinetis support
K22: µTasker Kinetis FRDM-K22F support / µTasker Kinetis TWR-K22F120M support
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