i am trying to create a Center aligned PWM complementary signals en the FRDM-K64F using KDS.
in the reference manual of K64P144M (40.4.9 Complementary mode) there the next conditions.
FTMEN = 1, QUADEN = 0, DECAPEN = 0, COMBINE = 1, CPWMS = 0, and COMP = 1.
I initialized the registers but i have not nothing in the output channel, it supposed that the values of the CnV register are the value reading with the ADC channel.
This is my code..
//**************************************************
// DEFINE USES FOR THE TPM MODULES
//**************************************************
//source clock select.
#define FTM_PLLFLL 1
#define FTM_OSCERCLK 2
#define FTM_MCGIRCLK 3
#define FTM_CNT_DIS 0
#define FTM_CLK 1
#define FTM_EXT_CLK 2
//preescaler definitions.
#define PS_1 0
#define PS_2 1
#define PS_4 2
#define PS_8 3
#define PS_16 4
#define PS_32 5
#define PS_64 6
#define PS_128 7
//confuralbles bits for the TPM modules.
#define FTM_OC_TOGGLE FTM_CnSC_MSA_MASK|FTM_CnSC_ELSA_MASK
#define FTM_OC_CLR FTM_CnSC_MSA_MASK|FTM_CnSC_ELSB_MASK
#define FTM_OC_SET FTM_CnSC_MSA_MASK|FTM_CnSC_ELSA_MASK|FTM_CnSC_ELSB_MASK
#define FTM_OC_OUTH FTM_CnSC_MSB_MASK|FTM_CnSC_MSA_MASK|FTM_CnSC_ELSB_MASK
#define FTM_OC_OUTL FTM_CnSC_MSB_MASK|FTM_CnSC_MSA_MASK|FTM_CnSC_ELSA_MASK
#define FTM_PWM_H FTM_CnSC_MSB_MASK|FTM_CnSC_ELSB_MASK // PWM with HIGH TRUE pulse.
#define FTM_PWM_L FTM_CnSC_MSB_MASK|FTM_CnSC_ELSA_MASK // PWM with LOW TRUE pulse.
#define EDGE_PWM 0
#define CENTER_PWM 1
void init_FTM0(void)
{
SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK|SIM_SCGC5_PORTC_MASK;
PORTC_PCR1 = PORT_PCR_MUX(4); // S1
PORTC_PCR2 = PORT_PCR_MUX(4); // S2
PORTC_PCR3 = PORT_PCR_MUX(4); // S3
PORTC_PCR4 = PORT_PCR_MUX(4); // S4
PORTA_PCR1 = PORT_PCR_MUX(3); // S5
PORTA_PCR2 = PORT_PCR_MUX(3); // S6
SIM_SOPT2 |= SIM_SOPT2_PLLFLLSEL(1);
SIM_SCGC6 |= SIM_SCGC6_FTM0_MASK;
FTM0_MODE = FTM_MODE_WPDIS_MASK; // write protection is disable
FTM0_MOD = FTM_MOD_MOD(350);// FTM mod
FTM0_MODE = FTM_MODE_FTMEN_MASK; // all registers are available
FTM0_SC |= FTM_SC_PS(PS_4)|FTM_SC_CLKS(FTM_CLK); // Prescale divided by 4, setup source clock
FTM0_COMBINE |= FTM_COMBINE_COMBINE0_MASK|FTM_COMBINE_COMBINE1_MASK|FTM_COMBINE_COMBINE3_MASK; // enable combine for CH0-CH1,CH2-CH3,CH6-CH7
FTM0_COMBINE |= FTM_COMBINE_COMP0_MASK|FTM_COMBINE_COMP1_MASK|FTM_COMBINE_COMP3_MASK;//enable complement of CH0-CH1,CH2-CH3,CH6-CH7
FTM0_COMBINE |= FTM_COMBINE_DTEN0_MASK|FTM_COMBINE_DTEN1_MASK|FTM_COMBINE_DTEN3_MASK;// enable deadtime.
FTM0_DEADTIME = FTM_DEADTIME_DTVAL(10);// set deadtime
FTM0_CNTIN = 1;
FTM0_CNT= 1;
FTM0_C0SC |= FTM_PWM_H; //S1 High true pulses
FTM0_C1SC |= FTM_PWM_L; //S2 Low true pulses
FTM0_C2SC |= FTM_PWM_H; //S3
FTM0_C3SC |= FTM_PWM_L; //S4
FTM0_C6SC |= FTM_PWM_H; //S5
FTM0_C7SC |= FTM_PWM_L; //S6
}
void pwm_write(unsigned int pwm1, unsigned int pwm2, unsigned int pwm3, unsigned int pwm4, unsigned int pwm5, unsigned int pwm6)
{
FTM0_C0V = FTM_CnV_VAL(pwm1); // write values in the CnV (is an ADC value that the function get)
FTM0_C1V = FTM_CnV_VAL(pwm2);
FTM0_C2V = FTM_CnV_VAL(pwm3);
FTM0_C3V = FTM_CnV_VAL(pwm4);
FTM0_C6V = FTM_CnV_VAL(pwm5);
FTM0_C7V = FTM_CnV_VAL(pwm6);
}
