Hi Scofield,
When using an Interrupt Service Routine (ISR) you have to consider next conditions:
- When Configuring your Peripheral (In my case I will use PIT_CH0 as Interrupt source) you have to set the right flags to request an interrupt:

- Then, you must enable its respective vector in the NVIC module. This steps consists to write to specific ISER register and set its priority:
As you can see on Interrupt Vector Assignments table on MCU’s reference manual, PIT_CH0 vector is expressed as 38, however, when enable this vector on NVIC module, we must select IRQ value (38 – 16 = 22; It subtracts 16 because the first 16 vectors are core-vectors.)

- After NVIC configuration is done, We must enable all interrupts in the core, this is done by using the assembler instruction: CPSIE i:
/* Enable interrupts (clear PRIMASK) */
#define ENABLE_INTERRUPTS asm(" CPSIE i");
- Then, we must implement our ISR. In this ISR we must clear the specific flag that causes the interrupt request.
void PIT_CH0_IRQHandler(void) {
/* Clear Timer Interrupt Flag */
PIT_TFLG0 |= PIT_TFLG_TIF_MASK;
/* Do your ISR proccess here */
}
- At this point, how does the MCU knows that PIT_CH0_IRQHanlder corresponds to PIT0? Well, there is a table located at: Project_Settings > Startup_Code > kinetis_sysinit.c (for CodeWarrior 10.6 and bare metal project)

- In this source file, there is a table where all ISR are declared, so make sure your ISR is named exactly the same as in InterruptVector table:

- After following these steps you shouldn’t have any problems on attending the specific ISR.
I attached the project (It was done using a KE04 board) but hope this could serve as example.
Regards,
Isaac Avila