Does the KL26 MCU USB DMA change the BDT address? Does the KL26 USB DMA enabled always?

[2743294708]

After the USB transmission completed, does the USB DMA change the BDT address?

For example, 8 bytes to be received, the buffer address "X" is set to BDT address register. When the transmission completed, the BDT address register value is "X" or "X+7"?

Does the USB DMA enabled always? I don't find the correspoding set register.

Thanks.

[miduo]

Hello,

Sorry, it seems I missed this issue.

Regarding the question 2, see Table 35-3. Buffer descriptor format of the reference manual, when KEEP is set,
normally the NINC bit is also set that will prevent address increment.

[2743294708]

Hi Li Fang,

   Thanks. It's clear.

   Can you help answering another question about I2S FIFO underrun?

   Please refer to the following link:

https://community.nxp.com/thread/494088 

[miduo]

Hello,

I checked that post you mentioned, it seems that you had resolved it by your own. Great!

[miduo]

Hello,

Answer to your questions:

1. Yes, the internal DMA function in USB module which is used to interrogate the BDT, enabled always.

2.  Do you mean the USBx_BDTPAGEx? If yes, it will not changed. USBx_BDTPAGEx assign BDT base address.

3. The BDT must be located on a 512-byte boundary in system memory. 16 bytes are needed for each USB endpoint direction.  For normal enumeration process, USB host will first read first 8 byte of the device descriptor (GET DEVICE DESCRIPTOR command). There has detailed information in chapter 35 of the KL26RM.

[2743294708]

Thanks for your reply.

Question 1: It's clear.

Question 2: It's not about the USBx_BDTPAGEx. I mean the address filed of BD. The address point to data memory to send or receive. Does it changed after USB DMA transmission. Please see the attached picture.

Question 3: I mean the DMA receives data in byte or word. If in WORD, the DMA receives 4-byte per time. The further question is the KL26 works in Little-Endian or Big-Endian.

[2743294708]

About the question 3, an addtional question is , does the DMA data transfer is 4-byte-aligned?

The following sample code confuses me( within the usb_device_khci.c, function USB_DeviceKhciRecv() ):

if ((khciState->dmaAlignBuffer) && (0U == khciState->isDmaAlignBufferInusing) &&
            (USB_DEVICE_CONFIG_KHCI_DMA_ALIGN_BUFFER_LENGTH >= length) &&
            ((length & 0x03U) || (((uint32_t)buffer) & 0x03U)))
        {
            khciState->endpointState[index].stateUnion.stateBitField.dmaAlign = 0U;
            buffer = khciState->dmaAlignBuffer;
            khciState->isDmaAlignBufferInusing = 1U;
        }

The code "((length & 0x03U) || (((uint32_t)buffer) & 0x03U)))" shows if the “length ” or the address of buffer is not 4-multiple, the DMA doesn't work.

[2743294708]

Would you please show me the corresponding spec about KL26 USB DMA? I have some questions about it.

1. Does the USB DMA enabled always?

2. Does the BDT address register's value changed after USB DMA transfer completed?

3. Does the DMA transfer data in byte(8-bit) or in WORD(32-bit)?