Clock generation in CAN bus devices

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Clock generation in CAN bus devices

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rknispel
Contributor II

I am looking for details of the clock generation in UJA1169ATK/F:

  • clock source
  • PLL
  • Jitter in 13 bit interval of CAN communications

Is there a technology papaer where it can be derived from?

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rknispel
Contributor II

The question was transferred into a service case and resolved there.

View solution in original post

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rknispel
Contributor II

The question was transferred into a service case and resolved there.

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guoweisun
NXP TechSupport
NXP TechSupport

What kinds of clock detail information do you need?

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rknispel
Contributor II

My questionnaire is about details of the Automotive qualification of the CAN communications of UJA1169ATK/F:

CAN network clock source
PLL frequency [MHz]
max. PLL jitter in 13 bit interval
oscillator manufacturer
oscillator part name
oscillator frequency [MHz]
oscillator tolerance [%]

Possible answers include clock recovery from CANH/CANL lines, and the oscillator would be MCU oscillator.

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guoweisun
NXP TechSupport
NXP TechSupport

These parameters should be checked or setting in CAN controller side,right?UJA1169 is CAN transceiver.

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rknispel
Contributor II

The parameters are relevant for reliabilty of CAN communications in on-board network as Automotive application. UJA1169 is considered for SBC of such a component.

Typically the internal clock is generated from TXD by clock recovery. I am looking for more details on this process!

Help is very much appreciated and thanks for any hints in advance!

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rknispel
Contributor II

The data sheet says "microcontrollerindependent clock source" is present on the chip, but where can further details be taken from?

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