Thank you for getting back to me. Two questions come to mind:
1. Just reading through the documentation, it isn't clear to me how the address parsing is handled. I pass in my address serially through the data in, and have the address bits tied to ground/Vdd depending on which device address I want. I then send bits in an I2C protocol format down the data line, and the internal logic compares the addresses I have selected on the chip vs the protocol bits I've sent. But aren't these the same address bits that would be parsed later by the I2C controller after the mux? If they are, then the mux doesn't do anything but pre-filter, and doesn't get me any additional address space.
2. Is there a chip that can serially decode an input address on a single line instead of requiring a multitude of wires to/from each chip? With the mux design above, I would still need 1 unique wire per device, which might technically be doable for me, but adds significant overhead costs and design issues. Having literally one data line that is decoded at each of the devices would be much simpler.
I very much appreciate your assistance. Please let me know if my comments or questions were confusing and I would be happy rephrase.
-Matt
