Hello everyone. I've stumbled acrossed a bit of a problem with my MCF5213 and am out of ideas as to where it is coming from.
To begin with, I ported a CAN driver from the MCF5282 to my MCF5213 eval board. The porting went fine and I am able to hook up to a Devicenet scanner and perform limitless CAN transactions without any problems.
In my configuration I am using only 1 message buffer for receive and 1 message buffer for transmits. These happen to be MB 5 for Rx and MB 14 for TX. I wrote the driver so I can change a define and assign Rx/Tx to other MBs during bootup - and this is where my problem has arisen.
If I try to use MBs 0-4 for Rx, the Rx interrupts fail to fire or even set their interrupt flags. MBs 5-12 work fine for RX. Has anyone experienced this before? I have double checked my driver and I cannot see any differences aside from which IMRH/L register bit gets set and where my buffer pointer to the MB storage gets assigned. Both appear to be getting set correctly from my debugging.
Whats even odder is MB 4 and 5 aren't at register byte boundaries on any register and don't cross registers (IMRL/IMRH). MBs 0-12 should be using RXMASK (which is setup identically no matter what MB I am using) so it shouldn't be that. I'm just out of options as to what it could be. For now I can continue using MB 5 for receive. But for my own edification I'd love to track down why MBs 0-4 fail. Thanks in advance for any suggestions!
Were you able to resolve your M5213 CAN problem? I am also porting the 5282 reference code to the 5213EVB. My current challenge is to get the interrupts to work. Would you have any code that you are willing to share?
Are you sure that the vectros have been configured for all interrupt sources? The interrupt masks may be correct in the interrupt controller set up but interrupt will not be generated if the interrupt priority of each has been set to a value greater than 0 (also avoid the same setting in multiple interrupts). If you are 5 off with th evector locations (for example) then 5 of them would not be able to work.
Reference on the M5213: IC_ICR_0_23 is CAN 0 ... IC_ICR_0_38 is CAN 15 Then IC_ICR_0_39 is CAN error interrupt, followed by IC_ICR_0_40 for CAN bus off interrupt.
If you happened to start at IC_ICR_0_28 (leaving IC_ICR_0_23 to IC_ICR_0_27 without initialisation) then the first 5 would not generate interrupts.
Yeah that was the first thing that came to mind. I double checked both my code and the register values themselves, and saw nothing wrong.
Anyhow, we should have hardware here in a week or so. Then I can spend some more time debugging it and I'll reply if I figure it out. I was more posting to see if some undocumented errata existed I wasn't aware of. Back to finishing up the ADC code for now!