Hello ,
It's 52259-based Tower Mechatronics board.
We use DTIM0 to generate interrupt by following codes :
MCF_DTIM0_DTRR = (1000000);
MCF_DTIM0_DTMR = 0
| MCF_DTIM_DTMR_PS(SYS_CLK_MHZ)
| MCF_DTIM_DTMR_ORRI
| MCF_DTIM_DTMR_FRR
| MCF_DTIM_DTMR_CLK_DIV1
| MCF_DTIM_DTMR_RST;
// Setup the interrupt controller registers for DTIM0
MCF_INTC0_ICR19 = MCF_INTC_ICR_IL(7) | MCF_INTC_ICR_IP(7);
MCF_INTC0_IMRL &= ~(MCF_INTC_IMRL_INT_MASK19 | MCF_INTC_IMRL_MASKALL);
ISR is defined :
__declspec(interrupt) void dtim0_handler_1(void)
{
printf("\n------------->>> DTIM0 <<<---------------\n");
/* Clear the interrupt event */
MCF_DTIM0_DTER |= MCF_DTIM_DTER_REF;
}
and vectors.s will define the VECTOR_TABLE.
During initialization, VBR will be written :
/* Copy the vector table to RAM */
for (n = 0; n < 256; n++)
__VECTOR_RAM[n] = VECTOR_TABLE[n];
mcf5xxx_wr_vbr((uint32)__VECTOR_RAM);
mcf5xxx_wr_vbr:
_mcf5xxx_wr_vbr:
move.l 4(SP),D0
.long 0x4e7b0801 /* movec d0,VBR */
nop
rts
We find interrupt is successfully triggered but ISR is not entered.
We check in debugger to see ISR address of dtim0_handler_1 has been correctly copied to __VECTOR_RAM.
Wondering why ISR is not entered?
Kind advices are appreciated.
Best Regards,
MG
found modify mcf5xxx_wr_vbr can solve it, as advised in https://community.freescale.com/message/89618#89618 , due to porting old codes to newer compiler of CW10.2