Hello agxin j,
You'll need to add this part for CS2 into eLBC controller setup section, you could refer to and edit base on the part for CS0:
# eLBC_BR0
mem [CCSR 0x124000] = 0xe8001001
# eLBC_ORg0
mem [CCSR 0x124004] = 0xf8000f85
eLBC_BR1 is for setting base address, port size, machine select and so on. Change the CCSR address from 0x124000 to 0x124008.
eLBC_ORg1 is mainly for setting address mask. Change the CCSR address from 0x124004 to 0x12400C.
Both the two registers are defined in chip reference manual, refer it for details field descriptions.
And add the part for the memory on CS2 in the LAW setup section, refer to and edit base on the part for CS0:
| mem [CCSR 0xc00] = 0x00000000 |
mem [CCSR 0xc04] = 0xE0000000
mem [CCSR 0xc08] = 0x81f0001b
This is for the memory map of the adding memory. Change the CCSR address to be the windows registers chosen, 0xCn0, 0xCn4, 0xCn8. The three registers could also be found in chip reference manual, refer to Section 2.4.
Finally add the MMU initialization for it, also refer to and edit base on the part for CS0:
reg ${CAM_GROUP}L2MMU_CAM2 = 0x9000000A1C080000E0000000E0000001Detail description of this register is contained in doc Targeting_PA_Processors.pdf, the doc is located in: D:\Freescale\CW_PA_v10.5.0\PA\Help\PDF
Have a great day,
Lunmin
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