LC60: Exiting stop3 and then immediately writting flash

[BasePointer]

Hi,

You know, to write to flash area, you have to set up FCDIV register once so that flash clock is in range 150-200kHz.

My bus frequency is 6.291456MHz in FEE mode, so I set divider as 35. (flash clock is 174.6KHz that is middle of the range)

For my application, the mcu enters to stop3 mode for a long time (a day), and then as soon as it wakes up, try to write some data to its flash area. As I know, mcu wakes at SCM mode to obtain fast wake-up time. it switch FEE mode automatically for a while later.

- How long time does it take mcu to switch FEE mode from SCM after waking-up?

- Should I wait for MCU to enter FEE mode before writting flash area?

- How does SCM frequency vary over temperature? There is a chart in the datasheet for trimmed 243kHz but, not for open loop DCO.

- If I try writting to flash area with open loop DCO after stop3, is it possible to violate 150kHz-200kHz range?

Regards,

BP.

Message Edited by BasePointer on 2008-04-05 06:19 PM

[JimDon]

"My bus frequency is 6.291456MHz in FEE mode, so I set divider as 35. (flash clock is 174.6KHz that is middle of the range)"

The you must wait for FEE mode to stabalize.

[BasePointer]

But after stop3, SCM has also 6.291456MHz in open loop mode. I just wonder its deviation over temperature.

[bigmac]

Hello BP,

My understanding is that, when STOP3 mode is exited and SCM is present, the DCO filter registers will have the same value as when STOP3 mode was entered.  I suspect this would mean that the time required for the FLL to attain lock will be significantly less than the worst case delay that may be experienced after a POR.

Since your flash clock setting is in the centre of its allowable range, you do have some leeway to allow for SCM temperature drift.  However, with 24 hours between wakeups, and the equipment subject to wide temperature variability, it would be more reliable to wait until lock occurs (as for a POR).

On the other hand, if wakeup were to occur much more frequently, say every minute or so, the SCM frequency over this period is far less likely to be affected by ambient temperature variation.  If wakeup were to occur at this frequency, wait until FLL lock, and then re-enter stop mode, the flash clock would be likely to remain within range, independent of lock mode.

I would suggest that the overall effect on battery drain, of doing this, would be negligible.  The additional non-stop mode operation should amount to considerably less than 3 seconds per day.

If the data being written to flash is critical, I would also suggest that you will need to read back each programmed byte from its flash location, to test for a successful write operation.

Regards,

Mac

Message Edited by bigmac on 2008-04-06 09:50 AM