AnsweredAssumed Answered

No automatic toggling of SSEL when SSP runs CPOL=0, CPHA=1

Question asked by Torbjørn Tvermosegaard on Oct 24, 2016

This is a follow up question for:

Using a LPC4357 I am interfacing to a SPI device demanding CPOL=0, CPHA=1, toggle of SSEL between each 16 bit word, the readings must be quite fast so I am using DMA and currently a 24MHz clock.
In datasheet UM10503 figure 137 covers this setup but the figure does not illustrate continuous back-to-back transfers as i.e. figure 138 does for another configuration of SPI.

Reading section the last paragraph states: "For continuous back-to-back transfers, the SSEL pin is held LOW between successive data words and termination is the same as that of the single word transfer."

This fact makes it impossible to interface to the given SPI device with the needed data rate, the device is the key component in our application so I would really like to know:


1. Is this behavior intentional -> is it the device vendor that does something wrong.

2. Is there a way of making SSEL automatically toggle between frames when CPOL=0, CPHA=1 ?


Sincerely Torbjørn