Is there a problem with SSP Data Size Select (DSS) in TI format

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Is there a problem with SSP Data Size Select (DSS) in TI format

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torbjoerntvermo
Contributor II

Using a LPC4357 I am reading data from a SPI device using the Texas Instruments frame format, in the SSP control register I have set Data Size Select (DSS) to 16-bit transfer and Frame Format (FRF) to TI.

Sampling on the falling edge of clock I would then expect 16 falling edges between falling and rising edge of the SSEL/FS but I only see 15 which messes up my readings, is this an error in the peripheral or have I missed something?

Screenshot of a supposedly 16-bit frame readout
wrongFrameSize.png

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ursaminor
Contributor II

Your expectation is in error!

The waveforms show 16 bits per frame. The frame sync signals coincides with the LSB on the data lines.

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ursaminor
Contributor II

Your expectation is in error!

The waveforms show 16 bits per frame. The frame sync signals coincides with the LSB on the data lines.

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torbjoerntvermo
Contributor II

Revisiting the datasheet I find you are correct with respect to my wrong expectation, but I do still seem to have a problem. I originally tried selecting SPI in FRF but the SSEL signal did not toggle at all, which led me to try the TI overseeing that it would not work in my case - therefore a follow up question:
I read from the device using DMA transfers, can I risk that the time between frames will be too low to actually let the SSEL line rise? Or since you can't possibly know the rise time in my system, what is the minimum time guaranteed between red lines in below clip from the datasheet? (Rev. 2.1 - Fig. 138)

SPI.png

EDIT: Revisiting the datasheet yet again answers my question, last part of 42.7.2.3 states: "For continuous back-to-back transfers, the SSEL pin is held LOW between successive data words and termination is the same as a single word transfer."
Fig. 138 shows CPOL=1, CPHA=0 but I use CPOL=0, CPHA=1 so that explains the toggling in my datasheet clip, it would be nice if Fig. 137 illustrated the continuous data transfer, so that one could see that the SSEL does not toggle between words.
This fact seems to make the SSEL control unusable for my application forcing me to use a GPIO that I can control myself, sadly I believe this will make it impossible to effectively use DMA and therefore it is not possible to make a working solution using the LPC4357 (or any NXP MCU?). Since we have a series of instruments using the LPC43xx series, my only option now will be if we can convince the vendor of the SPI unit to implement bulk transfers without the need of toggling CS/SSEL between each 16-bit word.

Is there any way to achieve automatic SSEL toggling between words in SSP peripheral HW (CPOL=0, CPHA=1)

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