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DMA and On Chip RAM

Question asked by Harjit Singh on Oct 21, 2019
Latest reply on Oct 23, 2019 by jeremyzhou

From reading AN12437, it seems that the DMA engine can access ITCM, DTCM and OCRAM. Is this true?

 

How does one deal with coherency i.e. let's say I have a buffer in DTCM or OCRAM and am DMAing data from the UART. Do I use the MPU to configure the region as non-cached?

 

I haven't found the document that talks about cache, DMA and coherency.

 

Thanks.

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