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EIM Burst configuration

Question asked by mauro scoccia on Apr 16, 2019
Latest reply on Apr 17, 2019 by igorpadykov
Hello.
I'm trying to connect an FPGA with the microprocessor (MCIMX6QSAVT10AD) via eim bus.
I would like to know how to configure the burst in both writing and reading
The various setups used by me allow me to write or read a maximum of 2 16-bit words with a single chip select transaction.
If I try to perform a write access for example of 3 16-bit words, I see on the bus a chip select transaction to write the third word, and then at a distance of 400 ns another transaction is seen relating to the first 2 words
I enclose the waveforms of the various signals involved to better explain the problem.

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