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Two SPI communications on FlexIO2

Question asked by David OUATTARA on Feb 26, 2019
Latest reply on Mar 11, 2019 by Kerry Zhou



I am using FlexIO2 on iMXRT1050 in order to have two independant SPI communications. The signals needed are, for both buses, SCLK and MISO.

Using only one SCLK clock signal with two MISO input signals works well.

Tried to make it work as two pairs (SCLK + MISO) but it doesn't work for the moment. The configuration is :

  • GPIO_B0_02 : SCLK1 with timerIndex[0] trigger on both edges of MISO1
  • GPIO_B0_01 : MISO1 with shifterIndex[1]
  • GPIO_B1_02 : SCLK2 with timerIndex[1] trigger on both edges of MISO2
  • GPIO_B1_01 : MISO2 with shifterIndex[0]

Is it possible to have some support on this issue?