frdmk64f ewm driver example gives HardFault when configuring PTE24 to EWM_Out

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frdmk64f ewm driver example gives HardFault when configuring PTE24 to EWM_Out

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knovinger
Contributor III

I'm playing with the EWM driver example provided with the FRDMK64 SDK for MCUXpresso.  The example itself runs fine, but i'm trying to map EWM_Out.  I've used MCUXpresso's Pin Tool to generate the code to configure PTE24 to EWM_Out and copy/pasted the generated code into the respective pin_mux.c/.h files included in the board folder of the frdmk64f_ewm project.  The project builds fine, but when i run the debugger it halts at the HardFault_Handler.  When stepping thru the code, prior to halt, it appears the fault occurs when attempting to configure PTE24.  Specifically when the PCR is configured in the Port_SetPinMux function.

**********************************

Here is the code generated by Pin Tools...

pin_mux.h **************


/*! @name PORTE24 (number 31), J2[20]/U8[4]/I2C0_SCL
@{ */
#define BOARD_INITPINS_ACCEL_SCL_PORT PORTE /*!<@brief PORT device name: PORTE */
#define BOARD_INITPINS_ACCEL_SCL_PIN 24U /*!<@brief PORTE pin index: 24 */
/* @} */

pin_mux.c **************

/* PORTE24 (pin 31) is configured as EWM_OUT_b */
PORT_SetPinMux(BOARD_INITPINS_ACCEL_SCL_PORT, BOARD_INITPINS_ACCEL_SCL_PIN, kPORT_MuxAlt6);

*************************************

I have not changed anything else from the default EWM configuration set in the driver example.

I read something in the K64 Reference Manual about "The pad state is controlled by the EWM_Out signal only after the EWM is enabled by the EWMEN bit of the CTRL register."  I don't know if this is just information or if it means the IO pin cannot be configure to EWM_Out until after EWM is enabled.  In the driver example, the IO pin is configured prior to EWM being enabled.

Am I missing a configuration parameter or sequence somewhere?

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mjbcswitzerland
Specialist V

Hi Kevin

Try enabling the Port E gate (0x00002000) in SIM_SCGC5 before accessing its configuration register.

Regards

Mark

uTasker - for more performance and faster, cheaper product development

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2 Replies
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mjbcswitzerland
Specialist V

Hi Kevin

Try enabling the Port E gate (0x00002000) in SIM_SCGC5 before accessing its configuration register.

Regards

Mark

uTasker - for more performance and faster, cheaper product development

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knovinger
Contributor III

Thank you Mark.  That's exactly what it needed.  I failed to catch that the Pin Tool did create this line...

CLOCK_EnableClock(kCLOCK_PortE);    /* Port E Clock Gate Control: Clock enabled */

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