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iMX6UL define sai1 as master

Question asked by Stefano Zuin Castillo on Aug 25, 2017
Latest reply on Jun 12, 2019 by Petr Kubiznak

Hi all!


I'm trying to use iMX6UL's SAI1 as master in order to connect it to an ADC. This device can be used just as slave and needs a MCLK signal to be enabled. I've tried to enabled this signal in my dtsi (MX6UL_PAD_CSI_DATA01__SAI1_MCLK) but is not posible to display the signal in the osciloscope. I've printed out princtrl-map and this signal is defined as part of SAI1.


I don't really know what I'm missing... This is my configuration:



                sai1: sai@02028000 {
                    compatible = "fsl,imx6ul-sai",
                    reg = <0x02028000 0x4000>;
                    interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
                    clocks = <&clks IMX6UL_CLK_SAI1_IPG>,
                         <&clks IMX6UL_CLK_DUMMY>,
                         <&clks IMX6UL_CLK_SAI1>,
                         <&clks 0>, <&clks 0>;
                    clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
                    dma-names = "rx", "tx";
                    dmas = <&sdma 35 24 0>, <&sdma 36 24 0>;
                    status = "disabled";





                  &sai1 {
                       pinctrl-names = "default";
                      pinctrl-0 = <&pinctrl_sai1>;
                      assigned-clocks = <&clks IMX6UL_CLK_SAI1_SEL>,<&clks IMX6UL_CLK_SAI1>;
                      assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
                      assigned-clock-rates = <0>, <11289600>;
                     status = "okay";



        pinctrl_sai1: sai1grp {
            fsl,pins = <
                MX6UL_PAD_CSI_DATA05__SAI1_TX_BCLK    0x11088
                MX6UL_PAD_CSI_DATA04__SAI1_TX_SYNC    0x17088
                MX6UL_PAD_CSI_DATA06__SAI1_RX_DATA    0x11088
                MX6UL_PAD_CSI_DATA07__SAI1_TX_DATA    0x11088
                MX6UL_PAD_CSI_DATA01__SAI1_MCLK        0x17088