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ls1021a unable to disable SERDES module with RCW

Question asked by marco jankovic on Feb 1, 2017
Latest reply on Feb 9, 2017 by ufedor

hi everyone,

i m facing problemes with a microcontroler based on ls1021a (it is the tqmls1021a-cc). We are trying to disable the SERDES module with the RCW using the  ref manual. section  32.1.1.1.2.1 procedure.

 

PBL preamble and RCW header                                                                                                                            

aa55aa55 01ee0100

 

 

 0             32              64            92                                                                                                                            

 0608000a 00000000 00000000 00000000

128          160           192            224

FF000000 00C07900 40025a00 21046000 (boot failures)

07000000 00007900 40025a00 21046000 ( with this configuration we boot. With any other one we don't)

256         288           320           352

00000000 00000000 00000000 000bc800

384         416           448           480         512

20124900 0004b340 00000000 00000000

 

Are we missing something in the procedure to disable the serdes module properly ?

We would like to  use etsec2 has RGMII. But we think that the SERDES module initialize some register during power on reset to force the controller to be in SGMII. this is why we need to be able to turn the SERDES module off.

 

We are basing our hypotesis on this from the refenrence manual :

 

20.5.8 Ethernet control register (eTSECx_ECNTRL)
ECNTRL is a register writable by the user to configure and initialize the eTSEC. Note
that the FIFM, GMIIM, TBIM, RMM, and RPM fields are read-only, having been set
after sampling signals at power-on-reset

 

and also on the SERDES protocole documentation.

 

So far we don't know yet if its possbile to configure etsec2 properly for RGMII mode with the SERDES module powered on.

 

We are using QCVS to generate RCW.

 

thank you for your support.

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