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LPC11E68 Serial port 3 RX interrupt.

Question asked by Ergo Pehtla on Jul 28, 2016
Latest reply on Aug 4, 2016 by Ergo Pehtla

Hi,

I'm using LPC11E68 Serial port 3. I am failing to get interrupt on RX. I can see that LPC_USART3.RXDATA fills with data but INTSTAT stays 0, and  USART2_3_IRQn is never called.

 

What i'm starting with is:

Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON);

Chip_GPIO_Init(LPC_GPIO);

Chip_Clock_SetUSARTNBaseClockRate((115200 * 48), true);

Chip_IOCON_PinMuxSet(LPC_IOCON, 2, 3, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN));

Chip_IOCON_PinMuxSet(LPC_IOCON, 2, 4, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN));

Chip_UARTN_Init(LPC_USART3);

Chip_UARTN_ConfigData(LPC_USART3, UARTN_CFG_DATALEN_8 | UARTN_CFG_PARITY_NONE | UARTN_CFG_STOPLEN_1);

Chip_UARTN_SetBaud(LPC_USART3, 115200);

Chip_UARTN_Enable(LPC_USART3);

Chip_UARTN_TXEnable(LPC_USART3);

Chip_UARTN_IntEnable(LPC_USART3, UARTN_INTEN_RXRDY);

Chip_UARTN_IntDisable(LPC_USART3, UARTN_INTEN_TXRDY);

NVIC_EnableIRQ(USART2_3_IRQn);

 

After that i'm having in LPC_USART3:

CFG=b101 (5) - does not change any time later. USART ENABE=1; 8N1; async.

CTRL=0 - does not change. normal operation, no autobaud.

STAT= b11110 on startup: RX is idle and no incoming, can send, tx idle,CTS=1.

INTENSET=1: RXRDYEN=1 - shall generate interrupt when RXDAT has data.

INTENCLR=0: - used for clearuig INTENSET bits, so hall be 0.

BRG=(2): The FRG clock is divided by 3 before use by the USART function.

INTSTAT=0: - this shall show when interrupt occurs?

OSR=b1111 (15): 16 peripheral clocks are used to transmit and receive each data bit.

ADDR=0, this is not used, as ADDRDET=0;

 

Checked that SYSAHBCLKCTRL bit 22 is set.

 

Then i'm sending data to modem and can see RXDATA and RXDATASTAT changes after modem answers.

Data seems to be correct there.

So this is seemingly not i/o level or pin configuration issue.

What i'm missing?

 

BR,

Ergo

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