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I2S Mclk 8x bit clock with Processor expert

Question asked by Tom Wood on Jun 22, 2015

I am trying to set up the I2S signals with processor expert using the SSI_LDD .  I don't seem to be able to get the bit clock and master clock to be in an 8:1 ratio.  The master clock seems to always include a divide by 250 in the divider chain and the bit clock does not.  I have tried various frequencies but they always have the divide by 250 in the chain. Other ratios are acceptable such as 16:1 and 12:1. In the I2S0_MclkDiv line of the clock path tab of the Master Clock, Clock rate select button there appears to be a 256 divide option but I can't seem to select it.

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