We use DDR_Stress_Tester_V1.0.3_UART1_for_SDboot&JTAG on i.MX6Quad original board.
https://community.freescale.com/docs/DOC-96412
- DDR_Stress_Tester_V1.0.3_UART1_for_SDboot&JTAG
We use the initialization file which we made in i.Mx6DQSDL DDR3 Script Aid.
https://community.freescale.com/docs/DOC-94917
When the DDR frequency is set to 400MHz, the DQS gating calibration succeeds.
However, when the DDR frequency is set to 528MHz, an error such as the following occurs.
=========================================================================
Would you like to run the DQS gating, read/write delay calibration? (y/n)
Starting DQS gating calibration...
. . . . . . . . . . . . . . ERROR FOUND, we can't get suitable value !!!!
dram test fails for all values.
=========================================================================
We doubt an initialization file in i.Mx6DQSDL DDR3 Script Aid.
We checked a parameter of Register Configuration, but do not understand the cause of this error.
May I have advice?
Best Regards,
Yuuki
Solved! Go to Solution.
Hi Yuuki
in general, this error may be caused by excessive board noise and
if all other tests passed, one can skip DQS gating calibration.
Formally one can try next steps to get rid of this error:
-verify the PCB design using "MX6 DRAM Bus Length Check" sheet in
"HW Design Checking List for i.Mx6DQSDL Rev2.8.xlsx"
HW Design Checking List for i.MX6DQSDL
-try to use WALAT = 1 in memory initialization script
-try different DDR_SEL options (11 or 10)
-try using different drive strength for DRAM signals for both i.MX6 and DRAM part
One can also try steps on below link for finding more accurate calibration values
https://community.freescale.com/message/341030#341030
Best regards
igor
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Hi Igor,
I cannot open this link. Can you share the contents here more directly please.
https://community.freescale.com/message/341030#341030
Thank you!
Best regards,
Judy