VYBrid VF6XX Cortex-M4 FPU performance

[thuanle]

Hi everyone,

I am evaluating the VYBrid VF6XX Cortex-M4 FPU performance by using Whetstone.

However, the result of SoftVFP and FPv4-SP are same.

(I am using DS-5)

Are there any suggestion?

Thank you so much.

Best regards,

Thuan Le

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[thuanle]

Hi Jiri, Alejandro and all;

Thank you so much for your answer.

Sorry but... I added your code into my program and the issue still exists.

Base on the description of FPSCR: ARM Information Center

Your code will do:

- Select Alternative half-precision format.

- Any operation involving one or more NaNs returns the Default NaN.

- Flush-to-zero mode enabled.

- Select Round towards Zero (RZ) mode.

Is it correct?

This setting looks like the mode configuration for FPU, not enable the FPU.

About enable FPU in the code, I already considered about it.

I read the Cortex M4 manual, there is sample code to enable FPU for Cortex M4 as below:

; CPACR is located at address 0xE000ED88

LDR.W R0, =0xE000ED88

; Read CPACR

LDR R1, [R0]

; Set bits 20-23 to enable CP10 and CP11 coprocessors

ORR R1, R1, #(0xF << 20)

; Write back the modified value to the CPACR

STR R1, [R0]

I also check to make sure whether the FPU is really enabled or not by watching below FPU registers: FPCCR. Its value is 0xc000_0000. It means the FPU is enabled.

I also check the assembly code of my program. I can see the instruction of FPU is generated (example: VMOV.F32) and this code can run well without any exception. It also means, the FPU is already enabled.

So, I think, maybe, the enabling FPU is not the root cause of this issue.

Above is just my opinion.

Please let me know if any comment.

Thank you.

Regards,

Thuan Le

[alejandrolozan1]

Hi,

As Jiri mentioned, those settings need to be chagend to generate FPU instructions and to enable the FPU unit.

[jiri-b36968]

Hi Thuan,

FP have to be enabled in the compiler but also on the Vybrid - in your code.

I did that on IAR so far - item FPU

and wrote in your code:

#ifdef _VFPv4_

  asm ( "MOV.W r0,#0x07C00000");

  asm ( "VMSR FPSCR, r0" );

  asm ( "MOV.W r0,#0x07C00000");

  asm ( "VMSR FPSCR, r0" );

#endif

In DS-5 it should be similar:

ARM Compiler toolchain Compiler Reference: --fpu=name

Select project properties - tools setting - code generation (C/Asm)

In code use ( not sure about the macro name )

  __asm( "MOV.W r0,#0x07C00000");

  __asm( "VMSR FPSCR, r0" );

  __asm( "MOV.W r0,#0x07C00000");

  __asm( "VMSR FPSCR, r0" );

/Jiri