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imx50 ecspi ss_ctl control

Question asked by michael carrier on Feb 27, 2013
Latest reply on Mar 24, 2013 by Yixing Kong
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I have an IMX50 EVK that I am trying to connect to a spi device. Our implementation requires the ss_ctl line to be active low during the entire 2 bytes transmit transaction. I have configured ecspi2 to be the master device and I am using the provided mxc_spi.c delivered with the MCIMX50EVK dev D board. I configured spidev2.0 to be my particular user space spi driver. I am attempting to send 2 bytes (0x5511) out the escpi2 device. Using an oscilloscope I can see the 2 data bytes and the associated clock. The slave select line goes low during the time each byte is transmitted. However, in between each byte the slave select line transitions high. I need this to remain low until the 2 bytes have been transmitted.

 

From what I am reading setting bit 8 in ECSPIx_CONFIGREG and configuring ECSPIx_PERIODREG to 0 should produce a slave select waveform such that the slave select line remains low during idle byte periods. What am I missing here?

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