What does a DMA transfer of reserved bits in registers do?

[imxrtuser]

Hello,

I want to do DMA transfers of the ADC-ETC result registers to another memory location. The reference manual provides following for the TRIG0_RESULT_1_0 register:

If I want to do a DMA transfer of DATA0 I have to read 2 bytes which will include the lower Reserved area.

The eDMA chapter of RT1020 has a sub-chapter

Does this mean if I do the above transfer the Reserved bits will always be 0 or does chapter 5.6.4 only apply to the reserved bits of eDMA registers?

Kind regards,

Stefan

[jeremyzhou]

Hi Stefan Mitterhauser,

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1) Does chapter 5.6.4 only apply to the reserved bits of eDMA registers?
-- Yes.

Have a great day,
TIC

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[imxrtuser]

Hi jeremyzhou,

thank you for answering my question.

What happens if you read the reserved bits of TRIG0_RESULT_1_0 with eDMA?

Kind regards,

Stefan

[mjbcswitzerland · Accepted solution]

Hello Stefan

Reading TRIG0_RESULT_1_0 via eDMA will read the same value as reading it via a CPU read access. These bits will be 0 in both cases.

If you read a non-existent register via eDMA it will bus fault as a read via CPU access would but doesn't result in the hard fault interrupt being called - in the case of eDMA access errors the eDMA channel is stopped and the eDMA error flag according to the channel is set (with some details about whether the access was destination or source and read/write/etc.) - in such a case you can look at the 'frozen' eDMA registers to see the value of the address in the source or destination register to identify the location in question.

Regards

Mark

[uTasker project developer for Kinetis and i.MX RT]

[imxrtuser]

Hello Mark,

thank you  for your explanation!

Kind regards,

Stefan