Setting iMXRT1176 FlexCAN filter bits

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

Setting iMXRT1176 FlexCAN filter bits

ソリューションへジャンプ
1,291件の閲覧回数
rnicolls
Contributor III

Hi,

I'm currently working with the FlexCAN module of the iMXRT1176 and trying to understand how to set the id filter bits for Message Buffers. 

My understanding is I can, for example, write a mask to the register RXMGMASK to identify which bits I want to use for the filter but I'm unsure where I write the actual filter. 

If I'm trying to filter the ID, would I write the desired ID to the ID register of the Message Buffer and this will be used as the filter? If that's the case, will the don't care bits of the ID be overwritten by the received message?

Thanks.

0 件の賞賛
返信
1 解決策
1,284件の閲覧回数
Hui_Ma
NXP TechSupport
NXP TechSupport

Hi,

First of all, sorry for the later reply.

The register RXMGMASK would take effective based on [IRMQ] bit of Module Configuration Register (CANx_MCR) Setting. [IRMQ] bit indicates whether Rx matching process will be based either on individual masking and queue or on masking scheme with RXMGMASK, RX14MASK and RX15MASK, RXFGMASK.

If RXMGMASK register set to 0x1FFFFFFF, that means only the RX message buffer set ID frame could be received. For example, if there only with one RX message buffer set ID is 0x123, only the CAN Frame with the ID 0x123 can pass the filter. The other CAN ID frame would be filtered.

If  RXMGMASK register set to 0x0, that means all CAN frame could be received. The CAN node working as a sniffer. 

Wish it helps.

Mike

元の投稿で解決策を見る

0 件の賞賛
返信
3 返答(返信)
1,281件の閲覧回数
rnicolls
Contributor III

Hi Mike,

Yes, I found your response helpful. 

Thank you. 

0 件の賞賛
返信
1,285件の閲覧回数
Hui_Ma
NXP TechSupport
NXP TechSupport

Hi,

First of all, sorry for the later reply.

The register RXMGMASK would take effective based on [IRMQ] bit of Module Configuration Register (CANx_MCR) Setting. [IRMQ] bit indicates whether Rx matching process will be based either on individual masking and queue or on masking scheme with RXMGMASK, RX14MASK and RX15MASK, RXFGMASK.

If RXMGMASK register set to 0x1FFFFFFF, that means only the RX message buffer set ID frame could be received. For example, if there only with one RX message buffer set ID is 0x123, only the CAN Frame with the ID 0x123 can pass the filter. The other CAN ID frame would be filtered.

If  RXMGMASK register set to 0x0, that means all CAN frame could be received. The CAN node working as a sniffer. 

Wish it helps.

Mike

0 件の賞賛
返信
917件の閲覧回数
max_yang1
Contributor III

It is very interesting to see this old post when I searched for suggestion for exact the same problem you had. However this time, on my target RT1064, the setting disabling self-receive does work for me. 

 

Max

0 件の賞賛
返信