RT1052 on/off pin explanation

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RT1052 on/off pin explanation

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variable_andrew
Senior Contributor I

I'm trying to understand the on/off pin connectivity and functionality requirements.

 

The confusing thing in the RT1052's RM is the mention of an external PMIC, does this mean the ONOFF pin can't just be directly connected to a user button and held down to effectively 'shut down' the RT1052?

1.

In section 13.5 of the RM, it sounds like if you just connect the ON/OFF button to a button it'd work as per the state diagram (fig 13-10), but then it mentions connecting to a PMIC/voltage regulator, making it sound like ON/OFF is actually an output that controls the voltage regulator?

 

2.

in "off" state, does the device basically act the same as if it was programmatically put into SNVS mode ?

 

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello, 

1. ONOFF signal is an input for the RT. In section 13.5 of the reference manual, when we mentioned the following: The ONOFF logic inside of SNVS_LP allows for connecting directly to a PMIC or other
voltage regulator device. It means that you could connect a signal from the PMIC directly to the ONOFF pin to turn OFF the RT when the supply voltage goes away or drops below a certain level. 

2. Yes, when you turn OFF the RT with the ONOFF button it's the same is at it you send it to SNVS mode by software. 

 

Have a great day,

Victor

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello, 

1. ONOFF signal is an input for the RT. In section 13.5 of the reference manual, when we mentioned the following: The ONOFF logic inside of SNVS_LP allows for connecting directly to a PMIC or other
voltage regulator device. It means that you could connect a signal from the PMIC directly to the ONOFF pin to turn OFF the RT when the supply voltage goes away or drops below a certain level. 

2. Yes, when you turn OFF the RT with the ONOFF button it's the same is at it you send it to SNVS mode by software. 

 

Have a great day,

Victor

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- We are following threads for 7 weeks after the last post, later replies are ignored

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variable_andrew
Senior Contributor I

got it, thanks @victorjimenez 

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variable_andrew
Senior Contributor I

trying to bump this post up for some confirmation of my understanding.

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