Dear forum,
I'm trying to get a MIPI DSI display panel (based on ST7701S) working with our custom MIMXRT1176 board. I'm using "evkmimxrt1170_vector_freertos" as a starting point. Low power DSI works perfectly – I can write all needed ST7701S registers, also read them and display a test pattern on the panel. However, I can't get any picture on the display using "high speed video" mode – the panel shows just a black window. My LCD driver initialization code shouldn't be a problem because I've got it from our display manufacturer. I've also adjusted timing parameters.
Here are display resolution and timing parameters:
#define DEMO_PANEL_WIDTH (480)
#define DEMO_PANEL_HEIGHT (640)
#define DEMO_HSW 2
#define DEMO_HFP 10
#define DEMO_HBP 33
#define DEMO_VSW 96
#define DEMO_VFP 16
#define DEMO_VBP 48
As far as I know, FSL MIPI drivers calculate all the necessary clocks according to MIPI pixel clock set in board/display_support.c
/*
* The pixel clock is (height + VSW + VFP + VBP) * (width + HSW + HFP + HBP) *
* frame rate.
*
* For 60Hz frame rate, the RK055IQH091 pixel clock should be 36MHz.
* the RK055AHD091 pixel clock should be 62MHz.
*/
const clock_root_config_t lcdifClockConfig = {
.clockOff = false,
.mux = 4, /*!< PLL_528. */
.div = 20, // 20 = 26.4
// 21 = 25.14285714
// 23 = 22.032000
// 25 = 21.12
};
For the reference, here's my calculated clocks:
Calculated clocks according specified information:
- Total Horizontal Samples = 480 + 2 + 10 + 33 = 525
- Total Vertical Lines = 640 + 96 + 16 + 48 = 800
- Pixel Clock Frequency (MHz) = 525 * 800 * 60 fps = 25200000 = 25,200 MHz (25200000)
- Total Data Rate (Bandwidth) = 25200000 * 24 bit = 604800000 = 604,800 Mbps
- Data Rate per Lane (bps) = 604800000 / 2 = 302400000 = 302,400 Mpbs
- Bit Clock Frequency = 302400000 / 2 = 151200000 = 151,200 MHz
Thank you.
