just clarify I'm referring to an example code to access SDRAM through MIMXRT1107 in the code it configure MPU in a following a sequence: disable d cache, cache present ,disable i cache, and Icache present and then access the region 9 setting , since im a fresher can someone please explain why there are following a procedure like above to configure MPU? (i have referred the referance mannual as well , but i didnt found anything )
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Hi @Charindu_Abeysekara ,
Thanks for your interest in NXP MIMXRT series!
MPU can divide the memory into different areas and set different access rights and attributes for each area. Through reasonable configuration of MPU, critical memory areas can be protected from illegal access, thus improving system security and stability.
The steps followed in this code to configure the MPU are as follows.
This rigorous configuration process is to ensure that when accessing critical memory areas, the expected memory properties and access rights are followed, preventing potential safety hazards or anomalies.
Best regards,
Gavin
Hi @Charindu_Abeysekara ,
Thanks for your interest in NXP MIMXRT series!
MPU can divide the memory into different areas and set different access rights and attributes for each area. Through reasonable configuration of MPU, critical memory areas can be protected from illegal access, thus improving system security and stability.
The steps followed in this code to configure the MPU are as follows.
This rigorous configuration process is to ensure that when accessing critical memory areas, the expected memory properties and access rights are followed, preventing potential safety hazards or anomalies.
Best regards,
Gavin