I am working on a project that requires rapidly transferring 127-190 KB over SPI within 26 milliseconds. The SPI bus speed is limited by the connected component to 50-60 MHz and individual transfers no larger than 3*2048 bytes. After receiving the data over SPI, and DMA'ing it into memory, it is then transferred over USB to a connected host.
The custom board does not have flash or connected RAM. The program is serially loaded over USB and operates entirely from ITCM/DTCM and OCRAM.
The data is being received into alternating buffers placed in OCRAM and aligned to 32-byte boundary. When one buffer is being received from LPSPI+DMA the other buffer is transmitted over USB.
This process is working in general but sometimes I receive sections of data that were not updated, they contain the same contents from the previous time that same buffer was used. It appears that the data was lost between the DMA and the actual memory making me suspect some sort of issue with a cache. I have confirmed the data is changing over SPI, and since SPI is operating without any gaps, clearly the DMA engine has been reading the data from the LPSPI receive fifo.
During testing I have tried modifying the LPSI clock root data rate for performance reasons. I have seen fewer issues when I operate the LPSI clock at a high rate that actually exceeds the maximum rating. When I operate the LPSI within the maximum rating of 133 MHz I encounter the issue quite at least a few times a second.
The very frustrating part is that the issue is quite intermittent and sometimes minor and unrelated changes can have a large impact on the frequency.
How do I make the LPSPI+DMA reliably copy data into memory?
Are there any known erratas/gotchas using eDMA on imxrt1062?
This project is using zephyr , but the issues seem to be specifically related to NXP's drivers. I have never encountered problems like this with other vendors chips using SPI and DMA on zephyr.
