Hi @vega_sdr ,
Seems my previous understanding is not correct. It is not the SAI ROOT clock, it is the sai rxbclk.
2 is the txclk1, from the above picture, it is the rxbclk.
So, do you check the RXBCLK, whether that have wave or not?
Best Regards,
kerry
Hi @vega_sdr
Do you configure the same sai1 clock to your SPDF0_CLK clock?
I mean, set your SAI1 clock the same frequency to your working SPDIF0_CLK_ROOT, whether this method works or not?
You can use the mcuxpresso project, cfg tool to configure the clock directly to test it.
Best Regards,
Kerry
Hi @vega_sdr ,
Seems my previous understanding is not correct. It is not the SAI ROOT clock, it is the sai rxbclk.
2 is the txclk1, from the above picture, it is the rxbclk.
So, do you check the RXBCLK, whether that have wave or not?
Best Regards,
kerry