Source code: https://github.com/JayHeng/NXP-MCUBootUtility 【v2.1.0】 Features: > 1. [RTyyyy] Support for loading bootable image into SEMC NOR boot device >     [RTyyyy] 支持下载Bootable image进主动启动设备 - SEMC NOR接口Flash > 2. [RTyyyy] Support operation under both CM7 and CM4 of RT117x A0 >     [RTyyyy] 在RT1170无论是CM7还是CM4作为主核下均能正常工作 > 3. [RTyyyy] Support two FlexSPI map addresses for RT117x A0 >     [RTyyyy] 支持RT1170的两个FlexSPI XIP映射地址 > 4. [RTyyyy] Support efuse memory operation for RT117x A0 >     [RTyyyy] 支持RT1170的eFuse回读与烧写 > 5. [RTyyyy] Can import user fuse table file to set efuse value >     [RTyyyy] 支持导入用户fuse配置文件去设置fuse > 6. [RTyyyy] Enable OTFAD encryption secure boot mode (User Key) for RT117x A0 >     [RTyyyy] 为RT1170 A0开启OTFAD加密(User Key)支持 > 7. [RTyyyy] Support RT1170/1010 bootable image from SDK as source input >     [RTyyyy] 支持RT1170/RT1010 SDK生成的Bootable image作为源文件输入 Improvements: > 1. [RTyyyy] Image format auto detection can be used for axf file from MCUX or GCC >     [RTyyyy] 程序格式自动检测选项也可用于MCUX生成的axf格式源文件 > 2. Specify file path instead of file to save readback data >    指定目录而不是指定文件去存放回读的数据 > 3. If readback data is enabled to be saved in file, then it will not displayed on the screen >    如果回读的数据已经选择保存到文件中，那么点击Read按钮将不会在窗口显示数据 Bugfixes: > 1. 'Cmd Pads' is not set correctly for some typical octal-flash models in FlexSPI NOR configuration >     在FlexSPI NOR配置界面里，对于一些octal-flash模型，其Cmd Pads参数没有被正确设置 > 2. 'Max Frequency' option is not exactly aligned with selected MCU device in FlexSPI NOR configuration >     在FlexSPI NOR配置界面里，Max Frequency参数选项与当前MCU型号不完全匹配 > 3. [RTyyyy] Cannot show total size of SD/eMMC correctly, so SD/eMMC cannot be programmed >     [RTyyyy] SD/eMMC总容量未能正确显示，导致无法编程SD/eMMC > 4. [RTyyyy] Some fields are not aligned with selected MCU device in Flexible User Key Setting >     [RTyyyy] 在用户自定义Key设置界面里，有些选项与当前选中的MCU型号不匹配 > 5. [RTyyyy] Cannot generate bootable image when original image size is less than 4KB >     [RTyyyy] 当输入的源image文件大小小于4KB时，生成可启动程序会失败 > 6. [RTyyyy] Sometimes tool cannot recognize .axf format from MCUX or Keil MDK >     [RTyyyy] 有时候无法识别MCUX或Keil MDK生成的axf格式源文件 > 7. [RTyyyy] Signed flashloader cannot be generated if DCD is enabled >     [RTyyyy] 当DCD使能的时候，无法生成含签名的Flashloader > 8. [RTyyyy] Cannot mark DCD in readback image if it comes from source bootable image >     [RTyyyy] 如果DCD来自源Bootable image，则无法在读回的image中标记DCD Interests: > 1. Add sound effect (Contra) >    增加魂斗罗音效

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[中文翻译版] 见附件 原文链接： https://community.nxp.com/docs/DOC-341985

This application note describes how to develop an audio player with NXP i.MX RT600 crossover MCU family. Click here to access the full application note.

The path of SDRAM Clock in Clock Tree                 According CCM clock tree in i.MXRT1050 reference manual, we can abstract part of SDRAM clock, and draw it’s diagram below.   Descriptions for Diagram 1 (1) PLL2 PFD2                 ① Registers related to PLL2 PFD2 ---CCM_ANALOG_PLL_SYSn (page 767, in reference manual) Address: 0x400D_8030h important bits: bit[15:14]---- select clock source. Bit[13] ----- Enable PLL output Bit[0]------- This field controls the PLL loop divider. 0 - Fout=Fref*20; 1 - Fout=Fref*22. ---CCM_ANALOG_PLL_SYS_NUM(page 768, in reference manual) Address: 0x400D_8050h important bits: bit[29:0]--- 30 bit numerator (A) of fractional loop divider (signed integer) ---CCM_ANALOG_PLL_SYS_DENOM (page 769, in reference manual) Address: 0x400D_8060h important bits: bit[29:0]---- 30 bit Denominator (B) of fractional loop divider (unsigned integer).   ---CCM_ANALOG_PFD_528n (page 769, in reference manual) Address: 0x400D_8100h important bits: bit[21:16]----- This field controls the fractional divide value. The resulting frequency shall be 528*18/PFD2_FRAC where PFD2_FRAC is in the range 12-35.   ② Computational formula PLL2_PFD2_OUT=(External 24MHz)*(Fout + A/B) * 18/ PFD2_FRAC   ③ Example for PLL2_PFD2_OUT computation CCM_ANALOG_PLL_SYSn[0] = 1  // Fout=Fref*22 CCM_ANALOG_PLL_SYS_NUM[29:0] = 56  // A = 56 CCM_ANALOG_PLL_SYS_DENOM[29:0] = 256  // B=256 CCM_ANALOG_PFD_528n[21:16] = 29                       // PFD2_FRAC=29   PLL2_PFD2_OUT = 24 * (22 + 56/256)*18/29 = 331MHz (330.98MHz)   (2) Clock Select Register : CCM_CBCDR Address: 0x 400F_C014h important bits: SEMC_ALT_CLK_SEL & SEMC_CLK_SEL & SEMC_PODF bit[7] --- bit[SEMC_ALT_CLK_SEL] 0---PLL2 PFD2 will be selected as alternative clock for SEMC root clock 1---PLL3 PFD1 will be selected as alternative clock for SEMC root clock Bit[6] --- bit[SEMC_CLK_SEL] 0----Periph_clk output will be used as SEMC clock root 1----SEMC alternative clock will be used as SEMC clock root Bit[18:16] --- bit[SEMC_PODF] Post divider for SEMC clock. NOTE: Any change of this divider might involve handshake with EMI. See CDHIPR register for the handshake busy bits. 000 divide by 1 001 divide by 2 010 divide by 3 011 divide by 4 100 divide by 5 101 divide by 6 110 divide by 7 111 divide by 8 Example for configuration of SDRAM Clock   Example : 166MHz SDRAM Clock   ---- 0x400D8030 = 0x00002001 // wirte  0x00002001 to CCM_ANALOG_PLL_SYSn ---- 0x400D8050 = 0x00000038 // write 0x00000038 to CCM_ANALOG_PLL_SYS_NUM ---- 0x400D8060 = 0x00000100 // write 0x00000100 to CCM_ANALOG_PLL_SYS_DENOM ---- 0x400D8100 = 0x001d0000 // write 0x001d0000 to CCM_ANALOG_PFD_528n ---- 0x400FC014 = 0x00010D40 // write 0x00010D40 to CCM_CBCDR, divided by 2         NXP TIC team Weidong Sun 2018-06-01

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Overview ======== The LPUART example for FreeRTOS demonstrates the possibility to use the LPUART driver in the RTOS with hardware flow control. The example uses two instances of LPUART IP and sends data between them. The UART signals must be jumpered together on the board. Toolchain supported =================== - MCUXpresso 11.0.0 Hardware requirements ===================== - Mini/micro USB cable - MIMXRT1050-EVKB board - Personal Computer Board settings ============== R278 and R279 must be populated, or have pads shorted. These resistors are under the display opposite side of board from uSD connector. The following pins need to be jumpered together: --------------------------------------------------------------------------------- | | UART3 (UARTA) | UART8 (UARTB) | |---|-------------------------------------|-------------------------------------| | # | Signal | Function | Jumper | Jumper | Function | Signal | |---|---------------|----------|----------|----------|----------|---------------| | 1 | GPIO_AD_B1_07 | RX | J22-pin1 | J23-pin1 | TX | GPIO_AD_B1_10 | | 2 | GPIO_AD_B1_06 | TX | J22-pin2 | J23-pin2 | RX | GPIO_AD_B1_11 | | 3 | GPIO_AD_B1_04 | CTS | J23-pin3 | J24-pin5 | RTS | GPIO_SD_B0_03 | | 4 | GPIO_AD_B1_05 | RTS | J23-pin4 | J24-pin4 | CTS | GPIO_SD_B0_02 | --------------------------------------------------------------------------------- Prepare the Demo ================ 1. Connect a USB cable between the host PC and the OpenSDA USB port on the target board. 2. Open a serial terminal with the following settings: - 115200 baud rate - 8 data bits - No parity - One stop bit - No flow control 3. Download the program to the target board. 4. Either press the reset button on your board or launch the debugger in your IDE to begin running the demo. Running the demo ================ You will see status of the example printed to the console. Customization options =====================