Hi community.
Described on The Hardware development Guide 3.5.1 Swapping data lines, NOTE If byte lane swapping was done, target DDR IC register read value must be transposed according to the data line swapping.
which registers The Register of DDR IC is?
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Hi Takashi
description implies case when processor tries to read DDR memory
Mode Register, when swapping bytes, one needs to foresee where
data will be read. Since it may be not byte0, but on other place.
Best regards
igor
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Hi Takashi
description implies case when processor tries to read DDR memory
Mode Register, when swapping bytes, one needs to foresee where
data will be read. Since it may be not byte0, but on other place.
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------