I am working on the linux kernel 3.10.17, to realize the imx6 communicate with FPGA usine the bus of PCIe,I have realized read and write correctly,the rate of write can reach up to 100B/s,can satisfy what I want,but the rate of read is very low,only reach to 100b/s,can’t satisfy the product qualification about 300b/s,please tell me how to increase the read rate of the PCIe bus?
Hi xiuqing
one can try to use dma, please check some examples on
i.MX6Q PCIe EP/RC Validation System
Best regards
igor
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hi,igorpadykov:
thanking you for answering my question,on my board,i.xm6 CPU connect with FPGA only by PCIe bus(can't use IPU DMA),writing rate can reach up to 100MB/s,but reading rate is very low, only can reach to 100Mb/s,can't satisfy my need 400Mb/s.Are you sure i can use DMA to increase reading rate,I read that the PCIe address space can't be read by SDMA module,only ARM and IPU can access PCIe space,the other bus master can't access PCIe space.please answer my two question:
1) Are you sure i can use DMA to increase reading rate?If i can ,please tell me which DMA controller to use?
2) If i can't use DMA,is there any other way to increase reading rate to about 400Mb/s?
please recheck carefully suggested material: IPU DMA was used for PCIe.