sgtl5000 lineout

[bcb9]

I used sgtl5000 as codec on my i.mx6q platform.The version of kernel is 3.0.35.The sgtl5000 voltages of vddio,vdda are 3.3v,and voltage of vddd is external 1.8v.According the datasheet,I set CHIP_REF_CTRL=0X1F0,CHIP_LINE_OUT_CTRL=0X322.When I use aplay to play 1kHz sin file,the wave of lineout sometime can  change to square wave, then restore to correct wave.Please ref the 01 and 02 png.I try to modify the CHIP_REF_CTRL value,the voltage of VAG pin is always 3.3v.

Can give me some advice?

[igorpadykov]

Hi bcb9

if lineout is sometime incorrect this may be poor soldering issue and

one can try to resolder codec. Also to narrow down issue one can test codec with

baremetal sdk test (zip can be found on https://community.nxp.com/thread/432859 ).

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[bcb9]

I have three boards.They are same problems.This problem can appear when every playback.

[bcb9]

The voltage of vag pin is correct,I make mistake.But the wave of lineout is sometime incorrect.