imx8mm的wav播放

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imx8mm的wav播放

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CheLL
Contributor III

Hello Everyon:

在Android9的环境下,移植了一个codec芯片程序,使用了sai3

设备树配置如下:

&sai3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai3>;
assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
assigned-clock-rates = <24576000>;

fsl,sai-asynchronous;
status = "okay";

};

aw8838: aw8838@37 {
compatible = "awinic,aw8838_codec";
reg = <0x37>;
reset-gpio = <&gpio1 15 0>;
status = "okay";
};

sound-aw8838 {
compatible = "fsl,imx-audio-aw8838";
model = "aw8838-audio";
audio-cpu = <&sai3>;
audio-codec = <&aw8838>;
};

播放48000Hz32bit的wav文件,能正常驱动,但是换成44100Hz16bit的wav文件报如下错误:

[ 444.644392] aw8838_startup: enter
[ 444.653581] aw8838_startup: enter
[ 444.660985] fsl-sai 30030000.sai: failed to derive required Tx rate: 1411200
[ 444.668046] fsl-sai 30030000.sai: ASoC: can't set 30030000.sai hw params: -22
[ 444.675204] aw8838_mute: mute state=1
Unable to open PCM device 0 (cannot set hw params: Invalid argument)
evk_8mm:/ #

想请教下如何播放44100Hz16bit的wav文件,出现上面的错误原因是什么?

 

希望大佬们能解答下

Bset Wishes

CheLL

 

 

 

 

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6 Replies

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Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hi,

 

Where did you get the aw8838 driver? I did not see aw8838 driver realized by nxp. You can refer the fsl codec driver in \vendor\nxp-opensource\kernel_imx\sound\soc\fsl. Some params set in driver may be different. 

 

Best Regards

Zhiming

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1,651 Views
CheLL
Contributor III

Hi,

 

This is a chip of a domestic chip company. Their codec chip has been verified by MTK. The machine code is the reference imx-wm8524. There is no problem playing 48000Hz32bit wav files at present, but the above error occurs at 44100Hz16bit. What may be the reason? What files need to be modified?

 

Best Wishes

CheLL

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Zhiming_Liu
NXP TechSupport
NXP TechSupport
The code hang in fsl-sai.c in sound/soc/fsl
 
ret = fsl_sai_set_bclk(cpu_dai, tx, bclk);
 
There are two reasons may cause code hang.I think the problem is clk.You can debug the fsl-sai to find correct params of your codec.
 
1.ratio set error,code  can not enter //1 
 
2. ret set error, code can not enter //2
 
static int fsl_sai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq)
{
    struct fsl_sai *sai = snd_soc_dai_get_drvdata(dai);
    unsigned char offset = sai->soc->reg_offset;
    unsigned long clk_rate;
    unsigned int reg = 0;
    u32 ratio, savesub = freq, saveratio = 0, savediv = 0;
    u32 id;
    int ret = 0;
 
 
    /* Don't apply to slave mode */
    if (sai->slave_mode[tx])
        return 0;
 
 
    for (id = 0; id < FSL_SAI_MCLK_MAX; id++) {
        clk_rate = clk_get_rate(sai->mclk_clk[id]);
        if (!clk_rate)
            continue;
 
 
        ratio = clk_rate / freq;
 
 
        ret = clk_rate - ratio * freq;
 
 
        /*
         * Drop the source that can not be
         * divided into the required rate.
         */
        if (ret != 0 && clk_rate / ret < 1000)
            continue;
 
 
        dev_dbg(dai->dev,
            "ratio %d for freq %dHz based on clock %ldHz\n",
            ratio, freq, clk_rate);
 
        //1
        if ((ratio % 2 == 0 && ratio >= 2 && ratio <= 512) ||
            (ratio == 1 && sai->verid.id >= FSL_SAI_VERID_0301)) {
 
            //2
            if (ret < savesub) {
                saveratio = ratio;
                sai->mclk_id[tx] = id;
                savesub = ret;
            }
 
 
            if (ret == 0)
                break;
        }
    }
 
 
    if (saveratio == 0) {
        dev_err(dai->dev, "failed to derive required %cx rate: %d\n",
                tx ? 'T' : 'R', freq);
        return -EINVAL;
    }
 

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CheLL
Contributor III

Hi~

Thank you for your answers

&sai3 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_sai3>;
    assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
    assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
    assigned-clock-rates = <24576000>;
    status = "okay";
};

The 48000Hz wav file is available, but 44100Hz is not.
Is it related to assigned-clock-rates = <24576000>;, should this value be changed to a multiple of 44100?

 

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Zhiming_Liu
NXP TechSupport
NXP TechSupport
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CheLL
Contributor III

Thanks for your answers!

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