imx6ull ADC read count values error

carbar · ‎04-03-2020

Hi, I'm having problems when reading cont values from ADCs on our custom board (I having the same problem when trying the same configuration in imx6ull_14x14_evk).

- VDDA_ADC_3P3(L13), ADC_VREFH(M13) connect to VLDO1(PF3000) 3.3V

- PADs: ADC1_IN2(L14), ADC1_IN8(N17),ADC1_IN9(M15) (0V in all pads)

- DeviceTree:

pinctrl_adc1: adc1grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x000000B0
MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x000000B0
MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x000000B0
>;
};
...
reg_vref_3v3: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "vref-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
...
&adc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc1>;
vref-supply = <&reg_vref_3v3>;
num-channels = <3>;
status = "okay";
};

drivers/iio/adc/vf610_adc.c with additional debug messages (as in iMX6UL adc calibration fails)

static void vf610_adc_calibration(struct vf610_adc *info) {     int adc_gc, hc_cfg;      if (!info->adc_feature.calibration)         return;      dev_info(info->dev, "vf610_adc_calibration start: Base address = %x\n",(int) info->regs);     dev_info(info->dev, "VF610_REG_ADC_HC0 = %x\n", readl(info->regs + VF610_REG_ADC_HC0));     dev_info(info->dev, "VF610_REG_ADC_HC1 = %x\n", readl(info->regs + VF610_REG_ADC_HC1));     dev_info(info->dev, "VF610_REG_ADC_HS = %x\n", readl(info->regs + VF610_REG_ADC_HS));     dev_info(info->dev, "VF610_REG_ADC_R0 = %x\n", readl(info->regs + VF610_REG_ADC_R0));     dev_info(info->dev, "VF610_REG_ADC_R1 = %x\n", readl(info->regs + VF610_REG_ADC_R1));     dev_info(info->dev, "VF610_REG_ADC_CFG = %x\n", readl(info->regs + VF610_REG_ADC_CFG));     dev_info(info->dev, "VF610_REG_ADC_GC = %x\n", readl(info->regs + VF610_REG_ADC_GC));     dev_info(info->dev, "VF610_REG_ADC_GS = %x\n", readl(info->regs + VF610_REG_ADC_GS));     dev_info(info->dev, "VF610_REG_ADC_CV = %x\n", readl(info->regs + VF610_REG_ADC_CV));     dev_info(info->dev, "VF610_REG_ADC_OFS = %x\n", readl(info->regs + VF610_REG_ADC_OFS));     dev_info(info->dev, "VF610_REG_ADC_CAL = %x\n", readl(info->regs + VF610_REG_ADC_CAL));     dev_info(info->dev, "VF610_REG_ADC_PCTL = %x\n", readl(info->regs + VF610_REG_ADC_PCTL));      /* enable calibration interrupt */     hc_cfg = VF610_ADC_AIEN | VF610_ADC_CONV_DISABLE;     writel(hc_cfg, info->regs + VF610_REG_ADC_HC0);      adc_gc = readl(info->regs + VF610_REG_ADC_GC);     writel(adc_gc | VF610_ADC_CAL, info->regs + VF610_REG_ADC_GC);      if (!wait_for_completion_timeout(&info->completion, VF610_ADC_TIMEOUT))         dev_err(info->dev, "Timeout for adc calibration\n");      dev_info(info->dev, "vf610_adc_calibration end: Base address = %x\n",(int) info->regs);     dev_info(info->dev, "VF610_REG_ADC_HC0 = %x\n", readl(info->regs + VF610_REG_ADC_HC0));     dev_info(info->dev, "VF610_REG_ADC_HC1 = %x\n", readl(info->regs + VF610_REG_ADC_HC1));     dev_info(info->dev, "VF610_REG_ADC_HS = %x\n", readl(info->regs + VF610_REG_ADC_HS));     dev_info(info->dev, "VF610_REG_ADC_R0 = %x\n", readl(info->regs + VF610_REG_ADC_R0));     dev_info(info->dev, "VF610_REG_ADC_R1 = %x\n", readl(info->regs + VF610_REG_ADC_R1));     dev_info(info->dev, "VF610_REG_ADC_CFG = %x\n", readl(info->regs + VF610_REG_ADC_CFG));     dev_info(info->dev, "VF610_REG_ADC_GC = %x\n", readl(info->regs + VF610_REG_ADC_GC));     dev_info(info->dev, "VF610_REG_ADC_GS = %x\n", readl(info->regs + VF610_REG_ADC_GS));     dev_info(info->dev, "VF610_REG_ADC_CV = %x\n", readl(info->regs + VF610_REG_ADC_CV));     dev_info(info->dev, "VF610_REG_ADC_OFS = %x\n", readl(info->regs + VF610_REG_ADC_OFS));     dev_info(info->dev, "VF610_REG_ADC_CAL = %x\n", readl(info->regs + VF610_REG_ADC_CAL));     dev_info(info->dev, "VF610_REG_ADC_PCTL = %x\n", readl(info->regs + VF610_REG_ADC_PCTL));      adc_gc = readl(info->regs + VF610_REG_ADC_GS);     if (adc_gc & VF610_ADC_CALF)         dev_err(info->dev, "ADC calibration failed\n");      info->adc_feature.calibration = false; }

static int vf610_read_raw(struct iio_dev *indio_dev,
 struct iio_chan_spec const *chan,
 int *val,
 int *val2,
 long mask)
{
 struct vf610_adc *info = iio_priv(indio_dev);
 unsigned int hc_cfg;
 long ret;

 dev_info(info->dev, "vf610_read_raw \n");
...

Driver registered and device detected:

root@imx6ullcom:/sys/bus/iio/devices/iio:device0# dmesg | grep vf610
calling vf610_pinctrl_init+0x0/0x18 @ 1
bus: 'platform': add driver vf610-pinctrl
initcall vf610_pinctrl_init+0x0/0x18 returned 0 after 0 usecs
calling gpio_vf610_init+0x0/0x18 @ 1
bus: 'platform': add driver gpio-vf610
initcall gpio_vf610_init+0x0/0x18 returned 0 after 530 usecs
calling vf610_adc_driver_init+0x0/0x18 @ 1
bus: 'platform': add driver vf610-adc
bus: 'platform': driver_probe_device: matched device 2198000.adc with driver vf610-adc
bus: 'platform': really_probe: probing driver vf610-adc with device 2198000.adc
vf610-adc 2198000.adc: no sleep pinctrl state
vf610-adc 2198000.adc: no idle pinctrl state
vf610-adc 2198000.adc: vf610_adc_calibration start 
vf610-adc 2198000.adc: VF610_REG_ADC_HC0 = 1f
vf610-adc 2198000.adc: VF610_REG_ADC_HC1 = 1f
vf610-adc 2198000.adc: VF610_REG_ADC_HS = 0
vf610-adc 2198000.adc: VF610_REG_ADC_R0 = 0
vf610-adc 2198000.adc: VF610_REG_ADC_R1 = 0
vf610-adc 2198000.adc: VF610_REG_ADC_CFG = 104e8
vf610-adc 2198000.adc: VF610_REG_ADC_GC = 20
vf610-adc 2198000.adc: VF610_REG_ADC_GS = 0
vf610-adc 2198000.adc: VF610_REG_ADC_CV = 0
vf610-adc 2198000.adc: VF610_REG_ADC_OFS = 0
vf610-adc 2198000.adc: VF610_REG_ADC_CAL = 0
vf610-adc 2198000.adc: VF610_REG_ADC_PCTL = 0
vf610-adc 2198000.adc: vf610_adc_calibration end
vf610-adc 2198000.adc: VF610_REG_ADC_HC0 = 9f
vf610-adc 2198000.adc: VF610_REG_ADC_HC1 = 1f
vf610-adc 2198000.adc: VF610_REG_ADC_HS = 0
vf610-adc 2198000.adc: VF610_REG_ADC_R0 = 2
vf610-adc 2198000.adc: VF610_REG_ADC_R1 = 0
vf610-adc 2198000.adc: VF610_REG_ADC_CFG = 104e8
vf610-adc 2198000.adc: VF610_REG_ADC_GC = 20
vf610-adc 2198000.adc: VF610_REG_ADC_GS = 0
vf610-adc 2198000.adc: VF610_REG_ADC_CV = 0
vf610-adc 2198000.adc: VF610_REG_ADC_OFS = 0
vf610-adc 2198000.adc: VF610_REG_ADC_CAL = 8
vf610-adc 2198000.adc: VF610_REG_ADC_PCTL = 0
driver: 'vf610-adc': driver_bound: bound to device '2198000.adc'
bus: 'platform': really_probe: bound device 2198000.adc to driver vf610-adc
initcall vf610_adc_driver_init+0x0/0x18 returned 0 after 126430 usecs
vf610-adc 2198000.adc: vf610_read_raw 
vf610-adc 2198000.adc: vf610_read_raw 
vf610-adc 2198000.adc: vf610_read_raw 
vf610-adc 2198000.adc: vf610_read_raw 
vf610-adc 2198000.adc: vf610_read_raw 
vf610-adc 2198000.adc: vf610_read_raw 
vf610-adc 2198000.adc: vf610_read_raw 
vf610-adc 2198000.adc: vf610_read_raw 
vf610-adc 2198000.adc: vf610_read_raw 
root@imx6ullcom:/sys/bus/iio/devices/iio:device0#

But values got from ADCs are not right:

root@imx6ullcom:/sys/bus/iio/devices/iio:device0# ls -l
-r--r--r-- 1 root root 4096 Jan 21 13:10 dev
-rw-r--r-- 1 root root 4096 Jan 21 13:10 in_voltage0_raw
-rw-r--r-- 1 root root 4096 Jan 21 13:10 in_voltage1_raw
-rw-r--r-- 1 root root 4096 Jan 21 13:10 in_voltage2_raw
-rw-r--r-- 1 root root 4096 Jan 21 13:10 in_voltage_sampling_frequency
-rw-r--r-- 1 root root 4096 Jan 21 13:10 in_voltage_scale
-r--r--r-- 1 root root 4096 Jan 21 13:10 name
lrwxrwxrwx 1 root root 0 Jan 21 13:10 of_node -> ../../../../../../firmware/devicetree/base/soc/aips-bus@02100000/adc@02198000
drwxr-xr-x 2 root root 0 Jan 21 13:10 power
-r--r--r-- 1 root root 4096 Jan 21 13:10 sampling_frequency_available
lrwxrwxrwx 1 root root 0 Jan 21 13:09 subsystem -> ../../../../../../bus/iio
-rw-r--r-- 1 root root 4096 Jan 21 13:09 uevent
root@imx6ullcom:/sys/bus/iio/devices/iio:device0# cat sampling_frequency_available
242647 69915 35869 18171 9146
root@imx6ullcom:/sys/bus/iio/devices/iio:device0# cat in_voltage_scale
vf610-adc 2198000.adc: vf610_read_raw
0.805664062
root@imx6ullcom:/sys/bus/iio/devices/iio:device0# cat in_voltage0_raw
vf610-adc 2198000.adc: vf610_read_raw
4060
root@imx6ullcom:/sys/bus/iio/devices/iio:device0# cat in_voltage1_raw
vf610-adc 2198000.adc: vf610_read_raw
170
root@imx6ullcom:/sys/bus/iio/devices/iio:device0# cat in_voltage2_raw
vf610-adc 2198000.adc: vf610_read_raw
0
root@imx6ullcom:/sys/bus/iio/devices/iio:device0#

Even if I change voltage in inputs to 3.3V I still get the same results.

Bets regards

Carlos Barreiro

carbar · ‎04-27-2020

Hello Igor,

I've tried to check ADCs using imx6ull-14x14-evk and I am having the same problem, values read from adcs are not correct.

I used for this test L4.1.15_2.0.1-patch_images_MX6ULLEVK with modifications in kernel to check ADCs:

sudo dd if=fsl-image-validation-imx-imx6ull14x14evk.sdcard of=/dev/mmcblk0 bs=1M && sync

e591809 (HEAD -> imx_4.1.15_2.0.0_ga-imx6ull-14x14-evk-adc, origin/imx_4.1.15_2.0.0_ga-imx6ull-14x14-evk-adc) CHG: arch/arm/configs/imx6ull-14x14-evk_defconfig: CONFIG_LOCALVERSION="-2.0.1", CONFIG_FHANDLE=y
85e5f8c ADD: arch/arm/configs/imx6ull-14x14-evk_defconfig: Copied from imx_v7_defconfig
5a8d19f CHG: drivers/iio/adc/vf610_adc.c: Enable debug
2b074c2 CHG: drivers/iio/adc/vf610_adc.c: vf610_adc_calibration(): Added debug info.
3d515f1 ARM: dts: imx6ull-14x14-evk: pinctrl_adc1: Added overlay of node
b2ae15e ARM: dts: imx6ull-14x14-evk: Add pinctrl_adc1
d368cfe CHG: arm: dts: imx6ull-14x14-evk: Delete overlay of tsc, deleted
6f7b2dd MLK-13422: ASoC: wm8960: fix the pitch shift issue after suspend/resume
d11bf9f MLK-13418: ASoC: wm8960: workaround no sound issue in master mode
17d542d ARM: imx: imx6ul: add PHY KSZ8081 new silicon revision fixup setting
b63f3f5 (tag: rel_imx_4.1.15_2.0.0_ga) MLK-13240: arm: imx6q: lpddr2 freq fix switch to 100Mhz

/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "imx6ull.dtsi"
/ {
model = "Freescale i.MX6 ULL 14x14 EVK Board";
compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull";
chosen {
stdout-path = &uart1;
};
memory {
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x14000000>;
linux,cma-default;
};
};
backlight {
compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
status = "okay";
};
pxp_v4l2 {
compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
status = "okay";
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_can_3v3: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "can-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio_spi 3 GPIO_ACTIVE_LOW>;
};
reg_sd1_vmmc: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "VSD_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
enable-active-high;
};

reg_vref_3v3: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "vref-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_gpio_dvfs: regulator-gpio {
compatible = "regulator-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dvfs>;
regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1400000>;
regulator-name = "gpio_dvfs";
regulator-type = "voltage";
gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
states = <1300000 0x1 1400000 0x0>;
};
};
sound {
compatible = "fsl,imx6ul-evk-wm8960",
"fsl,imx-audio-wm8960";
model = "wm8960-audio";
cpu-dai = <&sai2>;
audio-codec = <&codec>;
asrc-controller = <&asrc>;
codec-master;
gpr = <&gpr>;
/*
* hp-det = <hp-det-pin hp-det-polarity>;
* hp-det-pin: JD1 JD2 or JD3
* hp-det-polarity = 0: hp detect high for headphone
* hp-det-polarity = 1: hp detect high for speaker
*/
hp-det = <3 0>;
hp-det-gpios = <&gpio5 4 0>;
mic-det-gpios = <&gpio5 4 0>;
audio-routing =
"Headphone Jack", "HP_L",
"Headphone Jack", "HP_R",
"Ext Spk", "SPK_LP",
"Ext Spk", "SPK_LN",
"Ext Spk", "SPK_RP",
"Ext Spk", "SPK_RN",
"LINPUT2", "Mic Jack",
"LINPUT3", "Mic Jack",
"RINPUT1", "Main MIC",
"RINPUT2", "Main MIC",
"Mic Jack", "MICB",
"Main MIC", "MICB",
"CPU-Playback", "ASRC-Playback",
"Playback", "CPU-Playback",
"ASRC-Capture", "CPU-Capture",
"CPU-Capture", "Capture";
};
spi4 {
compatible = "spi-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi4>;
pinctrl-assert-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
status = "okay";
gpio-sck = <&gpio5 11 0>;
gpio-mosi = <&gpio5 10 0>;
cs-gpios = <&gpio5 7 0>;
num-chipselects = <1>;
#address-cells = <1>;
#size-cells = <0>;
gpio_spi: gpio_spi@0 {
compatible = "fairchild,74hc595";
gpio-controller;
#gpio-cells = <2>;
reg = <0>;
registers-number = <1>;
registers-default = /bits/ 8 <0x57>;
spi-max-frequency = <100000>;
};
};
};
&cpu0 {
arm-supply = <&reg_arm>;
soc-supply = <&reg_soc>;
dc-supply = <&reg_gpio_dvfs>;
};
&clks {
assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
assigned-clock-rates = <786432000>;
};
&csi {
status = "okay";
port {
csi1_ep: endpoint {
remote-endpoint = <&ov5640_ep>;
};
};
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
phy-mode = "rmii";
phy-handle = <&ethphy0>;
status = "okay";
};
&fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2>;
phy-mode = "rmii";
phy-handle = <&ethphy1>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <2>;
};
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
};
&flexcan1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
xceiver-supply = <&reg_can_3v3>;
status = "okay";
};
&flexcan2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
xceiver-supply = <&reg_can_3v3>;
status = "okay";
};
&gpc {
fsl,cpu_pupscr_sw2iso = <0x1>;
fsl,cpu_pupscr_sw = <0x0>;
fsl,cpu_pdnscr_iso2sw = <0x1>;
fsl,cpu_pdnscr_iso = <0x1>;
fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
mag3110@0e {
compatible = "fsl,mag3110";
reg = <0x0e>;
position = <2>;
};
fxls8471@1e {
compatible = "fsl,fxls8471";
reg = <0x1e>;
position = <0>;
interrupt-parent = <&gpio5>;
interrupts = <0 8>;
};
};
&i2c2 {
clock_frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
codec: wm8960@1a {
compatible = "wlf,wm8960";
reg = <0x1a>;
clocks = <&clks IMX6UL_CLK_SAI2>;
clock-names = "mclk";
wlf,shared-lrclk;
};
ov5640: ov5640@3c {
compatible = "ovti,ov5640";
reg = <0x3c>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_csi1>;
clocks = <&clks IMX6UL_CLK_CSI>;
clock-names = "csi_mclk";
pwn-gpios = <&gpio_spi 6 1>;
rst-gpios = <&gpio_spi 5 0>;
csi_id = <0>;
mclk = <24000000>;
mclk_source = <0>;
status = "okay";
port {
ov5640_ep: endpoint {
remote-endpoint = <&csi1_ep>;
};
};
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog_1>;
imx6ul-evk {
pinctrl_hog_1: hoggrp-1 {
fsl,pins = <
MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */
MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 /* SD1 VSELECT */
MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */
>;
};
pinctrl_csi1: csi1grp {
fsl,pins = <
MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088
MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088
MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088
MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088
MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088
MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088
MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088
MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088
MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088
MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088
MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088
MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088
>;
};
pinctrl_enet1: enet1grp {
fsl,pins = <
MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
>;
};
pinctrl_enet2: enet2grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
>;
};
pinctrl_flexcan1: flexcan1grp{
fsl,pins = <
MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
>;
};
pinctrl_flexcan2: flexcan2grp{
fsl,pins = <
MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
>;
};
pinctrl_adc1: adc1grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x000000B0
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
>;
};
pinctrl_lcdif_dat: lcdifdatgrp {
fsl,pins = <
MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79
MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79
MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79
MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79
MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79
MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79
>;
};
pinctrl_lcdif_ctrl: lcdifctrlgrp {
fsl,pins = <
MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0
>;
};
pinctrl_qspi: qspigrp {
fsl,pins = <
MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70a1
MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a1
MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70a1
MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70a1
MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70a1
MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1
>;
};
pinctrl_sai2: sai2grp {
fsl,pins = <
MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088
MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088
MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1
MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1
>;
};
pinctrl_uart2dte: uart2dtegrp {
fsl,pins = <
MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX 0x1b0b1
MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX 0x1b0b1
MX6UL_PAD_UART3_RX_DATA__UART2_DTE_CTS 0x1b0b1
MX6UL_PAD_UART3_TX_DATA__UART2_DTE_RTS 0x1b0b1
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
>;
};
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
>;
};
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
>;
};
pinctrl_usdhc2_8bit: usdhc2grp_8bit {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
>;
};
pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
>;
};
pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0
>;
};
};
};
&iomuxc_snvs {
pinctrl-names = "default_snvs";
pinctrl-0 = <&pinctrl_hog_2>;
imx6ul-evk {
pinctrl_hog_2: hoggrp-2 {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x80000000
>;
};
pinctrl_dvfs: dvfsgrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x79
>;
};

pinctrl_lcdif_reset: lcdifresetgrp {
fsl,pins = <
/* used for lcd reset */
MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x79
>;
};
pinctrl_spi4: spi4grp {
fsl,pins = <
MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1
MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1
MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1
MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000
>;
};
pinctrl_sai2_hp_det_b: sai2_hp_det_grp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x17059
>;
};
};
};

&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat
&pinctrl_lcdif_ctrl
&pinctrl_lcdif_reset>;
display = <&display0>;
status = "okay";
display0: display {
bits-per-pixel = <16>;
bus-width = <24>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <9200000>;
hactive = <480>;
vactive = <272>;
hfront-porch = <8>;
hback-porch = <4>;
hsync-len = <41>;
vback-porch = <2>;
vfront-porch = <4>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&pxp {
status = "okay";
};
&qspi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
status = "okay";
ddrsmp=<0>;
flash0: n25q256a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a";
spi-max-frequency = <29000000>;
spi-nor,ddr-quad-read-dummy = <6>;
reg = <0>;
};
};
&sai2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2
&pinctrl_sai2_hp_det_b>;
assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>,
<&clks IMX6UL_CLK_SAI2>;
assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
assigned-clock-rates = <0>, <12288000>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
fsl,uart-has-rtscts;
/* for DTE mode, add below change */
/* fsl,dte-mode; */
/* pinctrl-0 = <&pinctrl_uart2dte>; */
status = "okay";
};
&usbotg1 {
dr_mode = "otg";
srp-disable;
hnp-disable;
adp-disable;
status = "okay";
};
&usbotg2 {
dr_mode = "host";
disable-over-current;
status = "okay";
};
&usbphy1 {
tx-d-cal = <0x5>;
};
&usbphy2 {
tx-d-cal = <0x5>;
};
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
keep-power-in-suspend;
enable-sdio-wakeup;
vmmc-supply = <&reg_sd1_vmmc>;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
non-removable;
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,wdog_b;
};
&adc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc1>;
vref-supply = <&reg_vref_3v3>;
num-channels = <1>;
status = "okay";
};

I compiled kernel using imx6ull-14x14-evk_defconfig and I wrote zImage and imx6ull-14x14-evk.dtb to sd partition "Boot imx6ull" .

I got the same result

root@imx6ull14x14evk:~# dmesg | grep "Linux version\|command\|adc"
[ 0.000000] Linux version 4.1.15-2.0.1-ge591809 (carlos@carlos-HP-ProBook-6560b) (gcc version 5.3.0 (GCC) ) #1 SMP PREEMPT Mon Apr 27 19:23:24 CEST 2020
[ 0.000000] Kernel command line: console=ttymxc0,115200 root=/dev/mmcblk1p2 rootwait rw
[ 1.765586] vf610-adc 2198000.adc: vf610_adc_calibration start
[ 1.770258] vf610-adc 2198000.adc: VF610_REG_ADC_HC0 = 1f
[ 1.774664] vf610-adc 2198000.adc: VF610_REG_ADC_HC1 = 1f
[ 1.778901] vf610-adc 2198000.adc: VF610_REG_ADC_HS = 0
[ 1.783114] vf610-adc 2198000.adc: VF610_REG_ADC_R0 = 0
[ 1.787179] vf610-adc 2198000.adc: VF610_REG_ADC_R1 = 0
[ 1.791214] vf610-adc 2198000.adc: VF610_REG_ADC_CFG = 104e8
[ 1.795810] vf610-adc 2198000.adc: VF610_REG_ADC_GC = 20
[ 1.799939] vf610-adc 2198000.adc: VF610_REG_ADC_GS = 0
[ 1.804109] vf610-adc 2198000.adc: VF610_REG_ADC_CV = 0
[ 1.808161] vf610-adc 2198000.adc: VF610_REG_ADC_OFS = 0
[ 1.812282] vf610-adc 2198000.adc: VF610_REG_ADC_CAL = 0
[ 1.816527] vf610-adc 2198000.adc: VF610_REG_ADC_PCTL = 0
[ 1.827813] vf610-adc 2198000.adc: vf610_adc_calibration end
[ 1.835421] vf610-adc 2198000.adc: VF610_REG_ADC_HC0 = 9f
[ 1.839558] vf610-adc 2198000.adc: VF610_REG_ADC_HC1 = 1f
[ 1.849920] vf610-adc 2198000.adc: VF610_REG_ADC_HS = 0
[ 1.858617] vf610-adc 2198000.adc: VF610_REG_ADC_R0 = 1
[ 1.866269] vf610-adc 2198000.adc: VF610_REG_ADC_R1 = 0
[ 1.870242] vf610-adc 2198000.adc: VF610_REG_ADC_CFG = 104e8
[ 1.874884] vf610-adc 2198000.adc: VF610_REG_ADC_GC = 20
[ 1.878930] vf610-adc 2198000.adc: VF610_REG_ADC_GS = 0
[ 1.883008] vf610-adc 2198000.adc: VF610_REG_ADC_CV = 0
[ 1.886964] vf610-adc 2198000.adc: VF610_REG_ADC_OFS = 0
[ 1.891002] vf610-adc 2198000.adc: VF610_REG_ADC_CAL = 8
[ 1.895140] vf610-adc 2198000.adc: VF610_REG_ADC_PCTL = 0
[ 2.102923] can: broadcast manager protocol (rev 20120528 t)
root@imx6ull14x14evk:~# cd /sys/bus/iio/devices/iio:device0
root@imx6ull14x14evk:/sys/bus/iio/devices/iio:device0# ls -l
total 0
-r--r--r-- 1 root root 4096 Nov 5 06:28 dev
-rw-r--r-- 1 root root 4096 Nov 5 06:28 in_voltage0_raw
-rw-r--r-- 1 root root 4096 Nov 5 06:28 in_voltage_sampling_frequency
-rw-r--r-- 1 root root 4096 Nov 5 06:28 in_voltage_scale
-r--r--r-- 1 root root 4096 Nov 5 06:28 name
lrwxrwxrwx 1 root root 0 Nov 5 06:28 of_node -> ../../../../../../firmware/devicetree/base/soc/aips-bus@02100000/adc@02198000
drwxr-xr-x 2 root root 0 Nov 5 06:28 power
-r--r--r-- 1 root root 4096 Nov 5 06:28 sampling_frequency_available
lrwxrwxrwx 1 root root 0 Nov 5 06:28 subsystem -> ../../../../../../bus/iio
-rw-r--r-- 1 root root 4096 Jan 1 1970 uevent
root@imx6ull14x14evk:/sys/bus/iio/devices/iio:device0# cat in_voltage0_raw
vf610-adc 2198000.adc: vf610_read_raw
4089
root@imx6ull14x14evk:/sys/bus/iio/devices/iio:device0# cat in_voltage_sampling_frequency
vf610-adc 2198000.adc: vf610_read_raw
69915
root@imx6ull14x14evk:/sys/bus/iio/devices/iio:device0# cat in_voltage_scale
vf610-adc 2198000.adc: vf610_read_raw
0.805664062
root@imx6ull14x14evk:/sys/bus/iio/devices/iio:device0#

I placed resistor R1719 (SPF-28616_C2_base.pdf) and I measured voltage in J1706.pin3 = 0x02V, which doesn't correspond with value read by adc.

Best regards

Carlos Barreiro

igorpadykov · ‎04-03-2020

Hi Carlos

for pf3000 with i.mx6ull one can try "imx6ull9x9evk" configuration:

imx6ull-9x9-evk.dts\dts\boot\arm\arch - linux-imx - i.MX Linux kernel

Build using sect.5.1 Build configurations attached Yocto Guide

remove "pinctrl_tsc" for these pins.

Best regards
igor
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